| Run: | explore-04ca53e65f-20261014-114124 |
| Kind: | crash |
| Category: | Assertion failed: (SrcTy.isVector() && "mismatched cast between vector and non-vector"), function validateTruncExt, file MachineIRBuilder.cpp |
| Occurrences: | 10 in 2 configs, 2 test files |
| Snippet from: | calling-conv-vector-float.ll @callee_v2f32 via llvm-extract + llvm-reduce |
| Config: | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs |
| Local check: | reproduces at 04ca53e65f |
| Compiler Explorer: | https://godbolt.org/z/KaW5c63q1 (llc-assertions-trunk, checked 2026-10-14 11:03 UTC): G reproduces |
define <2 x float> @callee_v2f32(<2 x float> %x) {
ret <2 x float> %x
}
| Pane | Options | Exit | Insts | stderr |
|---|---|---|---|---|
| GlobalISel | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* | 134 | 0 | llc: /root/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1271: void llvm::MachineIRBuilder::validateTruncExt(llvm::LLT, llvm::LLT, bool): Assertion `SrcTy.isVector() && "mismatched cast between vector and non-vector"' failed. PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug. Stack dump: |
| SelectionDAG (control) | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel=0 | 0 | 1 | - |
llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o - llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel=0 snippet.ll -o -
llc: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1271: void llvm::MachineIRBuilder::validateTruncExt(const LLT, const LLT, bool): Assertion `SrcTy.isVector() && "mismatched cast between vector and non-vector"' failed. PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug. Stack dump: 0. Program arguments: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/build/bin/llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* -o - 1. Running pass 'Function Pass Manager' on module '<stdin>'. 2. Running pass 'IRTranslator' on function '@callee_v2f32' Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it): 0 llc 0x000056410ca5979b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) + 43 1 llc 0x000056410ca56641 llvm::sys::RunSignalHandlers() + 369 2 llc 0x000056410ca5a21b 3 libc.so.6 0x00007f9a8b445330 4 libc.so.6 0x00007f9a8b49ec0c pthread_kill + 284 5 libc.so.6 0x00007f9a8b44527e gsignal + 30 6 libc.so.6 0x00007f9a8b4288ff abort + 223 7 libc.so.6 0x00007f9a8b42881b 8 libc.so.6 0x00007f9a8b43b517 9 llc 0x000056410ebb5169 llvm::MachineIRBuilder::validateTruncExt(llvm::LLT, llvm::LLT, bool) + 905 10 llc 0x000056410ebb6012 llvm::MachineIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 3314 11 llc 0x000056410eacf153 llvm::CSEMIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 3091 12 llc 0x000056410ebb3a91 llvm::MachineIRBuilder::buildTrunc(llvm::DstOp const&, llvm::SrcOp const&, std::optional<unsigned int>) + 33 13 llc 0x000056410dc764da 14 llc 0x000056410eac4ee0 llvm::CallLowering::handleAssignments(llvm::CallLowering::ValueHandler&, llvm::SmallVectorImpl<llvm::CallLowering::ArgInfo>&, llvm::CCState&, llvm::SmallVectorImpl<llvm::CCValAssign>&, llvm::MachineIRBuilder&, llvm::ArrayRef<llvm::Register>) const + 928 15 llc 0x000056410dc736ec 16 llc 0x000056410eb31260 llvm::IRTranslatorImpl::runOnMachineFunction(llvm::MachineFunction&, llvm::function_ref<llvm::GISelCSEInfo* ()>, bool, llvm::function_ref<llvm::AAResults* ()>, llvm::function_ref<llvm::BranchProbabilityInfo* ()>, llvm::function_ref<llvm::AssumptionCache* ()>, llvm::TargetLibraryInfo*, llvm::LibcallLoweringInfo const*, llvm::SSPLayoutInfo*) + 3552 17 llc 0x000056410eb3250d llvm::IRTranslatorLegacy::runOnMachineFunction(llvm::MachineFunction&) + 733 18 llc 0x000056410d020d2d llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 653 19 llc 0x000056410cdb0cd7 llvm::FPPassManager::runOnFunction(llvm::Function&) + 871 20 llc 0x000056410cdb91d2 llvm::FPPassManager::runOnModule(llvm::Module&) + 50 21 llc 0x000056410cdb1a80 llvm::legacy::PassManagerImpl::run(llvm::Module&) + 2000 22 llc 0x000056410ca60df8 llcMain + 12056 23 llc 0x000056410c99c62f main + 63 24 libc.so.6 0x00007f9a8b42a1ca 25 libc.so.6 0x00007f9a8b42a28b __libc_start_main + 139 26 llc 0x000056410c99c525 _start + 37
| Input | Function | Config |
|---|---|---|
| calling-conv-vector-float.ll | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs | |
| fastcc-half.ll | -mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs | |
| calling-conv-vector-float.01659f2ddd.ll (mutant of calling-conv-vector-float.ll) | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs | |
| calling-conv-vector-float.3d3e6f9b0e.ll (mutant of calling-conv-vector-float.ll) | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs | |
| calling-conv-vector-float.4b429ddd91.ll (mutant of calling-conv-vector-float.ll) | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs | |
| calling-conv-vector-float.6ca7a9d9f5.ll (mutant of calling-conv-vector-float.ll) | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs | |
| calling-conv-vector-float.d9acc6635b.ll (mutant of calling-conv-vector-float.ll) | -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs | |
| fastcc-half.747d8a5b6a.ll (mutant of fastcc-half.ll) | -mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs | |
| fastcc-half.ab0211fcc6.ll (mutant of fastcc-half.ll) | -mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs | |
| fastcc-half.cf3bd2d827.ll (mutant of fastcc-half.ll) | -mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs |
Generated 2026-10-15 08:05 UTC.