crash: LLVM ERROR: Found 1 machine code errors.

Run:explore-04ca53e65f-20261014-114124
Kind:crash
Category:LLVM ERROR: Found 1 machine code errors. NEW
Occurrences:4 in 4 configs, 1 test files
Snippet from:callee-saved-gprs.1a12656f61.ll (mutant of callee-saved-gprs.ll) @callee via llvm-extract + llvm-reduce
Config:-mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:https://godbolt.org/z/z331Wxd31 (llc-assertions-trunk, checked 2026-10-14 11:49 UTC): G reproduces

Snippet:

define void @callee(ptr %var) {
  store [32 x i32] zeroinitializer, ptr %var, align 4
  store double 0.000000e+00, ptr poison, align 8
  ret void
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*1340
# After RISC-V Load / Store Optimizer
# Machine code for function callee: NoPHIs, TracksLiveness, NoVRegs, Legalized, RegBankSelected, Selected, TiedOpsRewritten, TracksDebugUserValues
SelectionDAG (control)-mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs -global-isel=0034-

Reproduce:

llc -mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

# After RISC-V Load / Store Optimizer
# Machine code for function callee: NoPHIs, TracksLiveness, NoVRegs, Legalized, RegBankSelected, Selected, TiedOpsRewritten, TracksDebugUserValues
Constant Pool:
  cp#0: double 0.000000e+00, align=8
Function Live Ins: $x10
bb.0 (%ir-block.0):
  liveins: $x10
  renamable $x11 = LUI target-flags(riscv-hi) %const.0
  renamable $x11 = ADDI killed renamable $x11, target-flags(riscv-lo) %const.0
  $x12_x13 = LD_RV32 killed $x11, 0 :: (load (s32) from constant-pool, align 8), (load (s32) from constant-pool + 4, basealign 8)
  SW $x0, renamable $x10, 0 :: (store (s32) into %ir.var)
  SW $x0, renamable $x10, 4 :: (store (s32) into %ir.var + 4)
  SW $x0, renamable $x10, 8 :: (store (s32) into %ir.var + 8)
  SW $x0, renamable $x10, 12 :: (store (s32) into %ir.var + 12)
  SW $x0, renamable $x10, 16 :: (store (s32) into %ir.var + 16)
  SW $x0, renamable $x10, 20 :: (store (s32) into %ir.var + 20)
  SW $x0, renamable $x10, 24 :: (store (s32) into %ir.var + 24)
  SW $x0, renamable $x10, 28 :: (store (s32) into %ir.var + 28)
  SW $x0, renamable $x10, 32 :: (store (s32) into %ir.var + 32)
  SW $x0, renamable $x10, 36 :: (store (s32) into %ir.var + 36)
  SW $x0, renamable $x10, 40 :: (store (s32) into %ir.var + 40)
  SW $x0, renamable $x10, 44 :: (store (s32) into %ir.var + 44)
  SW $x0, renamable $x10, 48 :: (store (s32) into %ir.var + 48)
  SW $x0, renamable $x10, 52 :: (store (s32) into %ir.var + 52)
  SW $x0, renamable $x10, 56 :: (store (s32) into %ir.var + 56)
  SW $x0, renamable $x10, 60 :: (store (s32) into %ir.var + 60)
  SW $x0, renamable $x10, 64 :: (store (s32) into %ir.var + 64)
  SW $x0, renamable $x10, 68 :: (store (s32) into %ir.var + 68)
  SW $x0, renamable $x10, 72 :: (store (s32) into %ir.var + 72)
  SW $x0, renamable $x10, 76 :: (store (s32) into %ir.var + 76)
  SW $x0, renamable $x10, 80 :: (store (s32) into %ir.var + 80)
  SW $x0, renamable $x10, 84 :: (store (s32) into %ir.var + 84)
  SW $x0, renamable $x10, 88 :: (store (s32) into %ir.var + 88)
  SW $x0, renamable $x10, 92 :: (store (s32) into %ir.var + 92)
  SW $x0, renamable $x10, 96 :: (store (s32) into %ir.var + 96)
  SW $x0, renamable $x10, 100 :: (store (s32) into %ir.var + 100)
  SW $x0, renamable $x10, 104 :: (store (s32) into %ir.var + 104)
  SW $x0, renamable $x10, 108 :: (store (s32) into %ir.var + 108)
  SW $x0, renamable $x10, 112 :: (store (s32) into %ir.var + 112)
  SW $x0, renamable $x10, 116 :: (store (s32) into %ir.var + 116)
  SW $x0, renamable $x10, 120 :: (store (s32) into %ir.var + 120)
  SW $x0, killed renamable $x10, 124 :: (store (s32) into %ir.var + 124)
  SD_RV32 killed $x12_x13, $x10, 0 :: (store (s32) into `ptr poison`, align 8), (store (s32) into `ptr poison` + 4, basealign 8)
  PseudoRET
# End machine code for function callee.
*** Bad machine code: Using an undefined physical register ***
- function:    callee
- basic block: %bb.0  (0x55de83f368a0)
- instruction: SD_RV32 killed $x12_x13, $x10, 0 :: (store (s32) into `ptr poison`, align 8), (store (s32) into `ptr poison` + 4, basealign 8)
- operand 1:   $x10
LLVM ERROR: Found 1 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0.	Program arguments: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/build/bin/llc -mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* -o -
1.	Running pass 'Function Pass Manager' on module '<stdin>'.
2.	Running pass 'Verify generated machine code' on function '@callee'
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0  llc       0x000055de6204779b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) + 43
1  llc       0x000055de62044641 llvm::sys::RunSignalHandlers() + 369
2  llc       0x000055de6204821b
3  

Occurrences (4):

InputFunctionConfig
callee-saved-gprs.1a12656f61.ll (mutant of callee-saved-gprs.ll)-mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs
callee-saved-gprs.46e1402e15.ll (mutant of callee-saved-gprs.ll)-mtriple=riscv32 -mattr=+zilsd -verify-machineinstrs -frame-pointer=all
callee-saved-gprs.b7408afe2f.ll (mutant of callee-saved-gprs.ll)-mtriple=riscv32 -mattr=+zilsd -verify-machineinstrs
callee-saved-gprs.fc04408341.ll (mutant of callee-saved-gprs.ll)-mtriple=riscv32 -mattr=+zilsd -target-abi ilp32e -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.