fallback: legalize: G_ASHR <2 x s64>

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_ASHR <2 x s64>
Occurrences:55 in 38 configs, 21 test files
Snippet from:rvp-simd-64.ll @test_paadd_w via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <2 x i32> @test_paadd_w(<2 x i32> %a, <2 x i32> %b) {
  %ext.a = sext <2 x i32> %a to <2 x i64>
  %ext.b = sext <2 x i32> %b to <2 x i64>
  %add = add nsw <2 x i64> %ext.a, %ext.b
  %shift = ashr <2 x i64> %add, splat (i64 1)
  %res = trunc <2 x i64> %shift to <2 x i32>
  ret <2 x i32> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %7:_(<2 x s64>) = G_ASHR %4:_, %5:_(<2 x s64>) (in function: test_paadd_w)
warning: Instruction selection used fallback path for test_paadd_w

Occurrences (55) (first 50):

InputFunctionConfig
rvp-simd-64.lltest_paadd_w-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pasub_w-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulh_v2i32-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
smulh.llsmulh_v2i32-mtriple=riscv32 -mattr=+m
smulh.llsmulh_v2i32-mtriple=riscv64 -mattr=+m
abds.195ddb7758.ll (mutant of abds.ll)abd_cmp_i8-mtriple=riscv32 -mattr=+zbb
abds.24021417da.ll (mutant of abds.ll)abd_cmp_i8-mtriple=riscv64
abds.5fb4f20bef.ll (mutant of abds.ll)abd_cmp_i8-mtriple=riscv32
abds.86fb33914e.ll (mutant of abds.ll)abd_cmp_i8-mtriple=riscv64 -mattr=+zbb
addimm-mulimm.8b8b0ac408.ll (mutant of addimm-mulimm.ll)add_mul_combine_reject_f1-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
addimm-mulimm.cae8c32172.ll (mutant of addimm-mulimm.ll)add_mul_combine_reject_f1-mtriple=riscv64 -mattr=+m,+zba -verify-machineinstrs
alloca.ee139313c2.ll (mutant of alloca.ll)alloca_callframe-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.151ca6758c.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.1a6682d239.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.5a9fa08130.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.6ac2eb161a.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.6e1e240219.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-intrinsics.6e326afd3d.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.7f62cf0501.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
half-intrinsics.822713be3f.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.856b73fb77.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.93919396b2.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.9dd45a608b.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.9f935932fa.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.a441a118b4.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d
half-intrinsics.b74b81c1b8.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.d160fd5e47.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.d2c8394538.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.dc83a46f11.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-intrinsics.f0947699ca.ll (mutant of half-intrinsics.ll)floor_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
load-setcc-combine.9d45d9fd89.ll (mutant of load-setcc-combine.ll)zext_nonneg_load_i16-mtriple=riscv64
loop-strength-reduce-add-cheaper-than-mul.403a3bb427.ll (mutant of loop-strength-reduce-add-cheaper-than-mul.ll)test-mtriple=riscv64 -verify-machineinstrs -mattr=+m
loop-strength-reduce-add-cheaper-than-mul.ff118de2de.ll (mutant of loop-strength-reduce-add-cheaper-than-mul.ll)test-mtriple=riscv32 -verify-machineinstrs -mattr=+m
machine-combiner-fma-chain.d204ca1586.ll (mutant of machine-combiner-fma-chain.ll)fma_chain_short-O3 -mtriple=riscv64 -mattr=+d
module-asm-features.207a921aef.ll (mutant of module-asm-features.ll)f-mtriple=riscv64-unknown-linux-gnu
module-asm-features.f0d1787af6.ll (mutant of module-asm-features.ll)f-mtriple=riscv64-unknown-linux-gnu -mattr=+d
note-gnu-property-zicfilp-unlabeled.512899729d.ll (mutant of note-gnu-property-zicfilp-unlabeled.ll)f--mtriple=riscv64
note-gnu-property-zicfilp-unlabeled.6155876b40.ll (mutant of note-gnu-property-zicfilp-unlabeled.ll)f--mtriple=riscv32
overflow-intrinsics.1c1459380f.ll (mutant of overflow-intrinsics.ll)uaddo_i32_decrement_alt-mtriple=riscv64 -verify-machineinstrs
overflow-intrinsics.3971622074.ll (mutant of overflow-intrinsics.ll)uaddo_i32_decrement_alt-mtriple=riscv32 -verify-machineinstrs
relative-reloc.bfc70e2b44.ll (mutant of relative-reloc.ll)f-mtriple=riscv64
repeated-fp-divisors.40ef01c7db.ll (mutant of repeated-fp-divisors.ll)no_arcp-mtriple=riscv64 -mattr=+d -verify-machineinstrs
sdata-limit-0.e0165f65b3.ll (mutant of sdata-limit-0.ll)f-mtriple=riscv32
sdata-limit-0.e16a3a00f4.ll (mutant of sdata-limit-0.ll)f-mtriple=riscv64
sdata-limit-4.6b3c3e187d.ll (mutant of sdata-limit-4.ll)f-mtriple=riscv64
sdata-limit-4.f7960bfcc3.ll (mutant of sdata-limit-4.ll)f-mtriple=riscv32
sdata-limit-8.18f9cb91f4.ll (mutant of sdata-limit-8.ll)f-mtriple=riscv32
sdata-limit-8.8f91d1467e.ll (mutant of sdata-limit-8.ll)f-mtriple=riscv64
sdata-local-sym.4bf2d5669c.ll (mutant of sdata-local-sym.ll)f-mtriple=riscv64
sdata-local-sym.f60deacfc3.ll (mutant of sdata-local-sym.ll)f-mtriple=riscv32

Generated 2026-10-15 08:05 UTC.