fallback: legalize: G_FDIV s16

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_FDIV s16
Occurrences:12 in 4 configs, 2 test files
Snippet from:half-arith.ll @fdiv_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fdiv_h(half %a, half %b) #0 {
  %1 = fdiv half %a, %b
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FDIV %0:_, %1:_ (in function: fdiv_h)
warning: Instruction selection used fallback path for fdiv_h

Occurrences (12):

InputFunctionConfig
half-arith.llfdiv_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfdiv_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfdiv_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfdiv_h-mtriple=riscv64 -verify-machineinstrs
rv32i-rv64i-half.llhalf_test-mtriple=riscv32 -verify-machineinstrs
rv32i-rv64i-half.llhalf_test-mtriple=riscv64 -verify-machineinstrs
rv32i-rv64i-half.1464809c94.ll (mutant of rv32i-rv64i-half.ll)half_test-mtriple=riscv64 -verify-machineinstrs
rv32i-rv64i-half.2c090ecaac.ll (mutant of rv32i-rv64i-half.ll)half_test-mtriple=riscv32 -verify-machineinstrs
rv32i-rv64i-half.823bdfccab.ll (mutant of rv32i-rv64i-half.ll)half_test-mtriple=riscv32 -verify-machineinstrs
rv32i-rv64i-half.ce2cc23daa.ll (mutant of rv32i-rv64i-half.ll)half_test-mtriple=riscv64 -verify-machineinstrs
rv32i-rv64i-half.d1a1f36f5a.ll (mutant of rv32i-rv64i-half.ll)half_test-mtriple=riscv32 -verify-machineinstrs
rv32i-rv64i-half.df3e71a141.ll (mutant of rv32i-rv64i-half.ll)half_test-mtriple=riscv64 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.