fallback: legalize: G

fallback: legalize: G_FEXP10 s16

Run:	explore-04ca53e65f-20261014-114124
Kind:	fallback
Category:	legalize: G_FEXP10 s16
Occurrences:	32 in 20 configs, 2 test files
Snippet from:	llvm.exp10.ll @exp10_v1f16 via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define <1 x half> @exp10_v1f16(<1 x half> %x) {
  %r = call <1 x half> @llvm.exp10.v1f16(<1 x half> %x)
  ret <1 x half> %r
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare <1 x half> @llvm.exp10.v1f16(<1 x half>) #0

attributes #0 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FEXP10 %0:_ (in function: exp10_v1f16)
warning: Instruction selection used fallback path for exp10_v1f16

Occurrences (32):

Input	Function	Config
half-intrinsics.ll	exp10_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	exp10_f16	`-mtriple=riscv64 -verify-machineinstrs`
llvm.exp10.ll	exp10_v1f16	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
llvm.exp10.ll	exp10_v1f16	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
half-intrinsics.1d0e0dee96.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.1e1d844d84.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d`
half-intrinsics.3a2326a884.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-intrinsics.3be2e87f42.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.4840b18e85.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d`
half-intrinsics.4b4fb5d984.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.52a8691357.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -verify-machineinstrs`
half-intrinsics.5553cd648a.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-intrinsics.6fcf4f060c.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-intrinsics.75f326fe22.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-intrinsics.7fa5caa30e.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-intrinsics.a11f1ead63.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.a6abb0b425.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-intrinsics.c52a5977df.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-intrinsics.c562257c85.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-intrinsics.e516e02f39.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-intrinsics.e867fd7594.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ec51046f06.ll (mutant of half-intrinsics.ll)	exp10_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
llvm.exp10.be5922fce9.ll (mutant of llvm.exp10.ll)	exp10_v1f16	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
llvm.exp10.ff89ebdab5.ll (mutant of llvm.exp10.ll)	exp10_v1f16	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`

Generated 2026-10-15 08:05 UTC.