fallback: legalize: G_FMA s16

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_FMA s16
Occurrences:58 in 16 configs, 3 test files
Snippet from:half-arith.ll @fmadd_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fmadd_h(half %a, half %b, half %c) #0 {
  %1 = call half @llvm.fma.f16(half %a, half %b, half %c)
  ret half %1
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare half @llvm.fma.f16(half, half, half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(s16) = G_FMA %0:_, %1:_, %2:_ (in function: fmadd_h)
warning: Instruction selection used fallback path for fmadd_h

Occurrences (58) (first 50):

InputFunctionConfig
half-arith.llfmadd_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfmsub_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmadd_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmadd_h_2-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmsub_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmsub_h_2-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfmadd_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfmsub_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmadd_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmadd_h_2-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmsub_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmsub_h_2-mtriple=riscv32 -verify-machineinstrs
half-arith.llfmadd_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfmsub_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmadd_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmadd_h_2-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmsub_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmsub_h_2-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfmadd_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfmsub_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmadd_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmadd_h_2-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmsub_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmsub_h_2-mtriple=riscv64 -verify-machineinstrs
half-intrinsics.llfma_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.llfma_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.llfma_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.llfma_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.llfma_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-intrinsics.llfma_f16-mtriple=riscv64 -verify-machineinstrs
half-zfa.llfma_neg_addend-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
half-zfa.llfma_neg_multiplicand-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
half-zfa.llfma_neg_addend_multiplicand-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
half-zfa.llfma_neg_addend-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin
half-zfa.llfma_neg_multiplicand-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin
half-zfa.llfma_neg_addend_multiplicand-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin
half-arith.1024de670e.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv32 -verify-machineinstrs
half-arith.2df021bfcb.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-arith.35d5e040a3.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-arith.638539ae68.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.655f632569.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv64 -verify-machineinstrs
half-arith.bdc5ad8fe3.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-arith.ef63c97632.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.f65b3af509.ll (mutant of half-arith.ll)fnmsub_h_2-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-intrinsics.0002454503.ll (mutant of half-intrinsics.ll)fma_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-intrinsics.08f6c3fcb6.ll (mutant of half-intrinsics.ll)fma_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-intrinsics.1ced042082.ll (mutant of half-intrinsics.ll)fma_f16-mtriple=riscv32 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-intrinsics.46ba8bd560.ll (mutant of half-intrinsics.ll)fma_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.5bd2800fb0.ll (mutant of half-intrinsics.ll)fma_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.73d4195e99.ll (mutant of half-intrinsics.ll)fma_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f

Generated 2026-10-15 08:05 UTC.