| Input | Function | Config |
|---|
| half-maximum-minimum.ll | fmaximum_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fmaximum_nnan_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fmaximum_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fmaximum_nnan_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fmaximum_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.ll | fmaximum_nnan_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.ll | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.ll | fmaximum_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fmaximum_nnan_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fmaximum_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fmaximum_nnan_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fmaximum_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.ll | fmaximum_nnan_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.ll | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-zfa.ll | fmaxm_h | -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin |
| half-zfa.ll | fmaxm_h | -mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin |
| half-maximum-minimum.15defdee49.ll (mutant of half-maximum-minimum.ll) | fmaximum_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.15defdee49.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.43621b1f52.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.4abe9e6dd3.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.4f8b002eb2.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.53d932eda9.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.61cc905164.ll (mutant of half-maximum-minimum.ll) | fmaximum_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.61cc905164.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.6839c75de6.ll (mutant of half-maximum-minimum.ll) | fmaximum_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.6839c75de6.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.70c35d635c.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.96e1f38253.ll (mutant of half-maximum-minimum.ll) | fmaximum_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.96e1f38253.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.cc866ebca4.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.d5f4a0e9f0.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.d6366f3384.ll (mutant of half-maximum-minimum.ll) | fmaximum_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.d6366f3384.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.e7d8cec513.ll (mutant of half-maximum-minimum.ll) | fmaximum_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.e7d8cec513.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.e8b9c50b25.ll (mutant of half-maximum-minimum.ll) | fmaximum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-zfa.5cff962580.ll (mutant of half-zfa.ll) | fmaxm_h | -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin |
| half-zfa.9e7bfdd033.ll (mutant of half-zfa.ll) | fmaxm_h | -mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin |
Generated 2026-10-15 08:05 UTC.