| Input | Function | Config |
|---|
| half-maximum-minimum.ll | fminimum_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_nnan_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_nnan_attr_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_nnan_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_nnan_attr_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.ll | fminimum_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.ll | fminimum_nnan_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.ll | fminimum_nnan_attr_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.ll | fminimum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.ll | fminimum_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_nnan_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_nnan_attr_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_nnan_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_nnan_attr_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ll | fminimum_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.ll | fminimum_nnan_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.ll | fminimum_nnan_attr_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.ll | fminimum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-zfa.ll | fminm_h | -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin |
| half-zfa.ll | fminm_h | -mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin |
| half-maximum-minimum.216cacaef9.ll (mutant of half-maximum-minimum.ll) | fminimum_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.216cacaef9.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.47560c70fb.ll (mutant of half-maximum-minimum.ll) | fminimum_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.47560c70fb.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 |
| half-maximum-minimum.5d52dc1d4f.ll (mutant of half-maximum-minimum.ll) | fminimum_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.5d52dc1d4f.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.633235ab6f.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_attr_f16 | -mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.6b1516c50b.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_attr_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.909acb0e39.ll (mutant of half-maximum-minimum.ll) | fminimum_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.909acb0e39.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 |
| half-maximum-minimum.ada4f7a821.ll (mutant of half-maximum-minimum.ll) | fminimum_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.ada4f7a821.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_op_f16 | -mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f |
| half-maximum-minimum.dedc3f1ba3.ll (mutant of half-maximum-minimum.ll) | fminimum_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-maximum-minimum.dedc3f1ba3.ll (mutant of half-maximum-minimum.ll) | fminimum_nnan_op_f16 | -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f |
| half-zfa.1bd9727afa.ll (mutant of half-zfa.ll) | fminm_h | -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin |
| half-zfa.cab10c1170.ll (mutant of half-zfa.ll) | fminm_h | -mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin |
Generated 2026-10-15 08:05 UTC.