fallback: legalize: G_FMINIMUM s16

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_FMINIMUM s16
Occurrences:42 in 8 configs, 2 test files
Snippet from:half-zfa.ll @fminm_h via llvm-extract
Config:-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fminm_h(half %a, half %b) #0 {
  %1 = call half @llvm.minimum.f16(half %a, half %b)
  ret half %1
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare half @llvm.minimum.f16(half, half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FMINIMUM %0:_, %1:_ (in function: fminm_h)
warning: Instruction selection used fallback path for fminm_h

Occurrences (42):

InputFunctionConfig
half-maximum-minimum.llfminimum_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_nnan_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_nnan_attr_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_nnan_op_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_nnan_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_nnan_attr_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_nnan_op_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.llfminimum_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-maximum-minimum.llfminimum_nnan_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-maximum-minimum.llfminimum_nnan_attr_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-maximum-minimum.llfminimum_nnan_op_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-maximum-minimum.llfminimum_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_nnan_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_nnan_attr_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_nnan_op_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_nnan_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_nnan_attr_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_nnan_op_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.llfminimum_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-maximum-minimum.llfminimum_nnan_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-maximum-minimum.llfminimum_nnan_attr_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-maximum-minimum.llfminimum_nnan_op_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-zfa.llfminm_h-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
half-zfa.llfminm_h-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin
half-maximum-minimum.216cacaef9.ll (mutant of half-maximum-minimum.ll)fminimum_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.216cacaef9.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_op_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.47560c70fb.ll (mutant of half-maximum-minimum.ll)fminimum_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-maximum-minimum.47560c70fb.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_op_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-maximum-minimum.5d52dc1d4f.ll (mutant of half-maximum-minimum.ll)fminimum_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.5d52dc1d4f.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_op_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.633235ab6f.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.6b1516c50b.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.909acb0e39.ll (mutant of half-maximum-minimum.ll)fminimum_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-maximum-minimum.909acb0e39.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_op_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-maximum-minimum.ada4f7a821.ll (mutant of half-maximum-minimum.ll)fminimum_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.ada4f7a821.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_op_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.dedc3f1ba3.ll (mutant of half-maximum-minimum.ll)fminimum_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.dedc3f1ba3.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_op_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-zfa.1bd9727afa.ll (mutant of half-zfa.ll)fminm_h-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin
half-zfa.cab10c1170.ll (mutant of half-zfa.ll)fminm_h-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin

Generated 2026-10-15 08:05 UTC.