fallback: legalize: G

fallback: legalize: G_FMUL s16

Run:	explore-04ca53e65f-20261014-114124
Kind:	fallback
Category:	legalize: G_FMUL s16
Occurrences:	30 in 21 configs, 5 test files
Snippet from:	half-arith.ll @fmul_h via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fmul_h(half %a, half %b) #0 {
  %1 = fmul half %a, %b
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FMUL %0:_, %1:_ (in function: fmul_h)
warning: Instruction selection used fallback path for fmul_h

Occurrences (30):

Input	Function	Config
fp16-promote.ll	test_fmul	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
half-arith.ll	fmul_h	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fmul_h	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fmul_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fmul_h	`-mtriple=riscv64 -verify-machineinstrs`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv64 -verify-machineinstrs`
atomic-cmpxchg.032b29b685.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv64 -mattr=+a,+ztso,+zacas,+zabha -verify-machineinstrs`
atomic-cmpxchg.0606914faf.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv64 -mattr=+a -verify-machineinstrs`
atomic-cmpxchg.1e33d24863.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs`
atomic-cmpxchg.3a517d658c.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv32 -verify-machineinstrs`
atomic-cmpxchg.4527598d98.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs`
atomic-cmpxchg.6d214c98bb.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv64 -mattr=+a,+ztso,+zacas -verify-machineinstrs`
atomic-cmpxchg.6e47bdebc3.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv32 -mattr=+a,+zacas -verify-machineinstrs`
atomic-cmpxchg.714655895d.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs`
atomic-cmpxchg.730619685e.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv32 -mattr=+a,+ztso,+zacas -verify-machineinstrs`
atomic-cmpxchg.90a3fd8fa9.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv32 -mattr=+a -verify-machineinstrs`
atomic-cmpxchg.e91f59e364.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs`
atomic-cmpxchg.f219506297.ll (mutant of atomic-cmpxchg.ll)	cmpxchg_i64_seq_cst_acquire	`-mtriple=riscv64 -verify-machineinstrs`
fp16-promote.26d704e11b.ll (mutant of fp16-promote.ll)	test_fmul	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
fp16-promote.7677e6cff7.ll (mutant of fp16-promote.ll)	test_fmul	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
fp16-promote.7b82ed1f36.ll (mutant of fp16-promote.ll)	test_fmul	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
inline-asm-zhinx-constraint-r.32e594b29a.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cf_half	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi=ilp32`
inline-asm-zhinx-constraint-r.6e181a2e20.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cf_half	`-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=ilp32`
inline-asm-zhinx-constraint-r.dc93f7c030.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cf_half	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi=lp64`
inline-asm-zhinx-constraint-r.f20f2a2990.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cf_half	`-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=lp64`
rv64-half-convert.4e559f6d2d.ll (mutant of rv64-half-convert.ll)	sitofp_i128_to_f16	`-mtriple=riscv64 -verify-machineinstrs -target-abi lp64`
rv64-half-convert.4ec2034e58.ll (mutant of rv64-half-convert.ll)	sitofp_i128_to_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`

Generated 2026-10-15 08:05 UTC.