fallback: legalize: G_FPEXT s128,s16

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_FPEXT s128,s16
Occurrences:28 in 14 configs, 1 test files
Snippet from:half-convert.ll @fcvt_q_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define fp128 @fcvt_q_h(ptr %x) {
  %a = load half, ptr %x, align 2
  %b = fpext half %a to fp128
  ret fp128 %b
}

Reproduce:

llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(s128) = G_FPEXT %2:_(s16) (in function: fcvt_q_h)
warning: Instruction selection used fallback path for fcvt_q_h

Occurrences (28):

InputFunctionConfig
half-convert.llfcvt_q_h-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs
half-convert.llfcvt_q_h-mtriple=riscv32 -mattr=+d -target-abi=ilp32d -verify-machineinstrs
half-convert.llfcvt_q_h-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d
half-convert.llfcvt_q_h-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d
half-convert.llfcvt_q_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-convert.llfcvt_q_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-convert.llfcvt_q_h-mtriple=riscv32 -verify-machineinstrs
half-convert.llfcvt_q_h-mtriple=riscv64 -mattr=+d -target-abi=lp64 -verify-machineinstrs
half-convert.llfcvt_q_h-mtriple=riscv64 -mattr=+d -target-abi=lp64d -verify-machineinstrs
half-convert.llfcvt_q_h-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d
half-convert.llfcvt_q_h-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d
half-convert.llfcvt_q_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-convert.llfcvt_q_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-convert.llfcvt_q_h-mtriple=riscv64 -verify-machineinstrs
half-convert.18383efdee.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d
half-convert.317e84515b.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv64 -mattr=+d -target-abi=lp64d -verify-machineinstrs
half-convert.39800b6dc6.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs
half-convert.3b61e417ae.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d
half-convert.43d5a48efc.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-convert.4b96449980.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-convert.5ee7bbc4f4.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv32 -mattr=+d -target-abi=ilp32d -verify-machineinstrs
half-convert.64d80f6d5f.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv64 -mattr=+d -target-abi=lp64 -verify-machineinstrs
half-convert.9719e5051d.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d
half-convert.e67a450d27.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv64 -verify-machineinstrs
half-convert.f2d5e4706c.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-convert.f38ad3a05e.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d
half-convert.fb36cac1c7.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-convert.fdea3d5911.ll (mutant of half-convert.ll)fcvt_q_h-mtriple=riscv32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.