| Run: | explore-04ca53e65f-20261014-114124 |
| Kind: | fallback |
| Category: | legalize: G_FPTOUI_SAT s64,s32 |
| Occurrences: | 32 in 6 configs, 2 test files |
| Snippet from: | float-convert.ll @fcvt_lu_s_sat via llvm-extract |
| Config: | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| Local check: | reproduces at 04ca53e65f |
| Compiler Explorer: | not uploaded (over --godbolt-limit or disabled) |
; Function Attrs: nounwind
define i64 @fcvt_lu_s_sat(float %a) #0 {
start:
%0 = tail call i64 @llvm.fptoui.sat.i64.f32(float %a)
ret i64 %0
}
; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.fptoui.sat.i64.f32(float) #1
attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }
llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o - llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f -global-isel=0 snippet.ll -o -
remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_FPTOUI_SAT %0:_(s32) (in function: fcvt_lu_s_sat) warning: Instruction selection used fallback path for fcvt_lu_s_sat
| Input | Function | Config |
|---|---|---|
| float-convert.ll | fcvt_lu_s_sat | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-convert.ll | fcvt_lu_s_sat | -mtriple=riscv32 -verify-machineinstrs |
| float-convert.ll | fcvt_lu_s_sat | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-convert.ll | fcvt_lu_s_sat | -mtriple=riscv64 -verify-machineinstrs |
| float-round-conv-sat.ll | test_floor_ui64 | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-round-conv-sat.ll | test_ceil_ui64 | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-round-conv-sat.ll | test_trunc_ui64 | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-round-conv-sat.ll | test_round_ui64 | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-round-conv-sat.ll | test_roundeven_ui64 | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-round-conv-sat.ll | test_rint_ui64 | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-round-conv-sat.ll | test_floor_ui64 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32 |
| float-round-conv-sat.ll | test_ceil_ui64 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32 |
| float-round-conv-sat.ll | test_trunc_ui64 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32 |
| float-round-conv-sat.ll | test_round_ui64 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32 |
| float-round-conv-sat.ll | test_roundeven_ui64 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32 |
| float-round-conv-sat.ll | test_rint_ui64 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32 |
| float-round-conv-sat.ll | test_floor_ui64 | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-round-conv-sat.ll | test_ceil_ui64 | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-round-conv-sat.ll | test_trunc_ui64 | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-round-conv-sat.ll | test_round_ui64 | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-round-conv-sat.ll | test_roundeven_ui64 | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-round-conv-sat.ll | test_rint_ui64 | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-round-conv-sat.ll | test_floor_ui64 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64 |
| float-round-conv-sat.ll | test_ceil_ui64 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64 |
| float-round-conv-sat.ll | test_trunc_ui64 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64 |
| float-round-conv-sat.ll | test_round_ui64 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64 |
| float-round-conv-sat.ll | test_roundeven_ui64 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64 |
| float-round-conv-sat.ll | test_rint_ui64 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64 |
| float-round-conv-sat.1dd9738b3d.ll (mutant of float-round-conv-sat.ll) | test_ceil_ui64 | -mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f |
| float-round-conv-sat.85334c10e1.ll (mutant of float-round-conv-sat.ll) | test_ceil_ui64 | -mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f |
| float-round-conv-sat.b380d06c5d.ll (mutant of float-round-conv-sat.ll) | test_ceil_ui64 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32 |
| float-round-conv-sat.ebeb01bd3b.ll (mutant of float-round-conv-sat.ll) | test_ceil_ui64 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64 |
Generated 2026-10-15 08:05 UTC.