fallback: legalize: G_FSIN s16

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_FSIN s16
Occurrences:18 in 16 configs, 2 test files
Snippet from:libcall-tail-calls.ll @sin_f16 via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @sin_f16(half %a) #0 {
  %1 = call half @llvm.sin.f16(half %a)
  ret half %1
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare half @llvm.sin.f16(half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32 -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32 -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FSIN %0:_ (in function: sin_f16)
warning: Instruction selection used fallback path for sin_f16

Occurrences (18):

InputFunctionConfig
half-intrinsics.llsin_f16-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d
half-intrinsics.llsin_f16-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d
half-intrinsics.llsin_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-intrinsics.llsin_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-intrinsics.llsin_f16-mtriple=riscv32 -verify-machineinstrs
half-intrinsics.llsin_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d
half-intrinsics.llsin_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d
half-intrinsics.llsin_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-intrinsics.llsin_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-intrinsics.llsin_f16-mtriple=riscv64 -verify-machineinstrs
libcall-tail-calls.llsin_f16-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32
libcall-tail-calls.llsin_f16-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
libcall-tail-calls.llsin_f16-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
libcall-tail-calls.llsin_f16-mtriple=riscv32 -verify-machineinstrs
libcall-tail-calls.llsin_f16-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64
libcall-tail-calls.llsin_f16-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
libcall-tail-calls.llsin_f16-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f
libcall-tail-calls.llsin_f16-mtriple=riscv64 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.