fallback: legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64 NEW
Occurrences:44 in 28 configs, 19 test files
Snippet from:atomicrmw-cond-sub-clamp.591358cf4d.ll (mutant of atomicrmw-cond-sub-clamp.ll) @atomicrmw_usub_sat_i64 via llvm-extract + llvm-reduce
Config:-mtriple=riscv64 -mattr=+a -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:https://godbolt.org/z/6YnafcGsP (llc-assertions-trunk, checked 2026-10-14 11:49 UTC): G reproduces

Snippet:

define <2 x i64> @atomicrmw_usub_sat_i64() {
  %LGV = load <2 x i64>, ptr null, align 16
  %I = insertelement <2 x i64> %LGV, i64 0, i16 0
  ret <2 x i64> %I
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv64 -mattr=+a -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*03remark: <unknown>:0:0: unable to legalize instruction: %2:_(<2 x s64>) = G_INSERT_VECTOR_ELT %0:_, %3:_(s64), %3:_(s64) (in function: atomicrmw_usub_sat_i64)
warning: Instruction selection used fallback path for atomicrmw_usub_sat_i64
SelectionDAG (control)-mtriple=riscv64 -mattr=+a -verify-machineinstrs -global-isel=003-

Reproduce:

llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+a -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<2 x s64>) = G_INSERT_VECTOR_ELT %0:_, %3:_(s64), %3:_(s64) (in function: atomicrmw_usub_sat_i64)
warning: Instruction selection used fallback path for atomicrmw_usub_sat_i64

Occurrences (44):

InputFunctionConfig
atomic-fence.1b4f463ead.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-fence.5bb100a804.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv64 -verify-machineinstrs
atomic-fence.99e62b2f7a.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs
atomic-fence.f7e47260e2.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-rmw-minmax.3d3cfb2d19.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_umin_i64_seq_cst-mtriple=riscv64 -mattr=+b,+zalrsc,+permissive-zalrsc,+a -verify-machineinstrs
atomicrmw-cond-sub-clamp.591358cf4d.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i64-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomicrmw-cond-sub-clamp.e19889b5bb.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i64-mtriple=riscv64 -verify-machineinstrs
atomicrmw-cond-sub-clamp.e2b509b736.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i64-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomicrmw-uinc-udec-wrap.5436e5495d.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i64-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomicrmw-uinc-udec-wrap.818f90e5b8.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i64-mtriple=riscv64 -verify-machineinstrs
atomicrmw-uinc-udec-wrap.c1f82f9a8f.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i64-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
avgceils.9c418c1769.ll (mutant of avgceils.ll)test_ext_i64-mtriple=riscv64 -verify-machineinstrs
avgceilu.d02392f611.ll (mutant of avgceilu.ll)test_ext_i64-mtriple=riscv64 -verify-machineinstrs
avgfloors.686b7c84b4.ll (mutant of avgfloors.ll)test_ext_i64-mtriple=riscv64 -verify-machineinstrs
avgflooru.ba344291ca.ll (mutant of avgflooru.ll)test_ext_i64-mtriple=riscv64 -verify-machineinstrs
bitreverse-shift.b43d1a1f46.ll (mutant of bitreverse-shift.ll)test_bitreverse_shli_bitreverse_i64-mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs
calling-conv-half.003bc17944.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv64 -mattr=+f -mattr=+zfh -verify-machineinstrs -target-abi lp64f -O1
calling-conv-half.0c63644a40.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-half.5fec0e16a2.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv64 -mattr=+f -mattr=+zfh -verify-machineinstrs -target-abi lp64 -O1
calling-conv-half.7c10ef73c4.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs
calling-conv-half.bb13508018.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv64 -verify-machineinstrs
calling-conv-half.da639d04ab.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv64 -mattr=+f,+zfhmin -target-abi=lp64f -verify-machineinstrs
jumptable-section.6b467923fb.ll (mutant of jumptable-section.ll)jt-mtriple=riscv64 -code-model=large -function-sections
jumptable-section.9d648c5898.ll (mutant of jumptable-section.ll)jt-mtriple=riscv64 -code-model=small
jumptable-section.c8cf025bc3.ll (mutant of jumptable-section.ll)jt-mtriple=riscv64 -code-model=medium
jumptable-section.eb07e2b5d3.ll (mutant of jumptable-section.ll)jt-mtriple=riscv64 -code-model=large
lrint-conv.4de97dcc62.ll (mutant of lrint-conv.ll)test_llrint_ixx_f128-mtriple=riscv64
lrint-conv.4de97dcc62.ll (mutant of lrint-conv.ll)test_llrint_ixx_f128-mtriple=riscv64
scmp.0787acb55d.ll (mutant of scmp.ll)scmp.64.64-mtriple=riscv64
shadow-stack-frame-opts.23e9860a27.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv64 -mattr=+zimop,+xqccmp
shadow-stack-frame-opts.4e72e5c8cf.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv64 -mattr=+zimop,+zcmp
shadow-stack-frame-opts.5bff4bcd64.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv64 -mattr=+zimop
shadow-stack-frame-opts.b909adc599.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv64 -mattr=+zimop,+save-restore
shadow-stack-frame-opts.f6acb819df.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv64 -mattr=+zimop,+zcmp,+save-restore
shl-cttz.3fd571cdf7.ll (mutant of shl-cttz.ll)shl_cttz_multiuse_i32-mtriple=riscv64 -mattr=+m,+zbb
shl-cttz.43821052d6.ll (mutant of shl-cttz.ll)shl_cttz_multiuse_i32-mtriple=riscv64 -mattr=+m
short-forward-branch-opt-min-max.0cc93ffeb7.ll (mutant of short-forward-branch-opt-min-max.ll)select_example_umin_1-mtriple=riscv64 -mattr=+zbb,+short-forward-branch-iminmax
short-forward-branch-opt-min-max.23ac0fb3b2.ll (mutant of short-forward-branch-opt-min-max.ll)select_example_umin_1-mtriple=riscv64 -mattr=+zbb,+short-forward-branch-ialu
short-forward-branch-opt-min-max.2b0651707c.ll (mutant of short-forward-branch-opt-min-max.ll)select_example_umin_1-mtriple=riscv64 -mattr=+zbb
split-store.451271ff13.ll (mutant of split-store.ll)mbb_int32_float_pair-mtriple=riscv64 -verify-machineinstrs
split-store.d1c32845d2.ll (mutant of split-store.ll)mbb_int32_float_pair-mtriple=riscv64 -mattr=+d -verify-machineinstrs
stack-folding.772dae255d.ll (mutant of stack-folding.ll)test_zext_w-mtriple=riscv64
stack-folding.b4a7d7babb.ll (mutant of stack-folding.ll)test_zext_w-mtriple=riscv64 -mattr=+zba,+zbb
ucmp.8aebec46ee.ll (mutant of ucmp.ll)ucmp.32.32_zext-mtriple=riscv64

Generated 2026-10-15 08:05 UTC.