fallback: legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64,s32

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64,s32 NEW
Occurrences:44 in 28 configs, 19 test files
Snippet from:atomicrmw-cond-sub-clamp.331689be3d.ll (mutant of atomicrmw-cond-sub-clamp.ll) @atomicrmw_usub_sat_i64 via llvm-extract + llvm-reduce
Config:-mtriple=riscv32 -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:https://godbolt.org/z/zYncdj9Tf (llc-assertions-trunk, checked 2026-10-14 11:49 UTC): G reproduces

Snippet:

define <2 x i64> @atomicrmw_usub_sat_i64(<2 x i64> %LGV) {
  %I = insertelement <2 x i64> %LGV, i64 0, i64 0
  ret <2 x i64> %I
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*07remark: <unknown>:0:0: unable to legalize instruction: %3:_(<2 x s64>) = G_INSERT_VECTOR_ELT %0:_, %4:_(s64), %5:_(s32) (in function: atomicrmw_usub_sat_i64)
warning: Instruction selection used fallback path for atomicrmw_usub_sat_i64
SelectionDAG (control)-mtriple=riscv32 -verify-machineinstrs -global-isel=007-

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(<2 x s64>) = G_INSERT_VECTOR_ELT %0:_, %4:_(s64), %5:_(s32) (in function: atomicrmw_usub_sat_i64)
warning: Instruction selection used fallback path for atomicrmw_usub_sat_i64

Occurrences (44):

InputFunctionConfig
atomic-fence.0bd6449b33.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv32 -verify-machineinstrs
atomic-fence.21d406f271.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-fence.a00a8a3155.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-fence.f24dedb146.ll (mutant of atomic-fence.ll)fence_singlethread_seq_cst-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw-minmax.32fe9923a5.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_umin_i64_seq_cst-mtriple=riscv32 -mattr=+b,+zalrsc,+permissive-zalrsc,+a -verify-machineinstrs
atomic-rmw-minmax.758c85cb08.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_umin_i64_seq_cst-mtriple=riscv32 -mattr=+b,+zalrsc -verify-machineinstrs
atomic-rmw-minmax.e62a7f8dd0.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_umin_i64_seq_cst-mtriple=riscv32 -mattr=+b,+zalrsc,+permissive-zalrsc -verify-machineinstrs
atomicrmw-cond-sub-clamp.331689be3d.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i64-mtriple=riscv32 -verify-machineinstrs
atomicrmw-cond-sub-clamp.76662eb8d6.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i64-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomicrmw-cond-sub-clamp.774391cbfd.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i64-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomicrmw-uinc-udec-wrap.13985cbf6b.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i64-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomicrmw-uinc-udec-wrap.3a4086f094.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i64-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomicrmw-uinc-udec-wrap.b8285fad83.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i64-mtriple=riscv32 -verify-machineinstrs
avgceils.b6aa3c236e.ll (mutant of avgceils.ll)test_ext_i64-mtriple=riscv32 -verify-machineinstrs
avgceilu.3deadc3ab2.ll (mutant of avgceilu.ll)test_ext_i64-mtriple=riscv32 -verify-machineinstrs
avgfloors.295c1dc2ce.ll (mutant of avgfloors.ll)test_ext_i64-mtriple=riscv32 -verify-machineinstrs
avgflooru.1e4d95e36c.ll (mutant of avgflooru.ll)test_ext_i64-mtriple=riscv32 -verify-machineinstrs
bitreverse-shift.ea03bce081.ll (mutant of bitreverse-shift.ll)test_bitreverse_shli_bitreverse_i64-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs
calling-conv-half.0802bb01a0.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv32 -mattr=+f,+zfhmin -target-abi=ilp32f -verify-machineinstrs
calling-conv-half.7738ad2d92.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv32 -mattr=+f -target-abi=ilp32f -verify-machineinstrs
calling-conv-half.7ad6eae235.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv32 -verify-machineinstrs
calling-conv-half.8123a21437.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv32 -mattr=+f -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -O1
calling-conv-half.9be890ccdf.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv32 -mattr=+f -mattr=+zfh -verify-machineinstrs -target-abi ilp32 -O1
calling-conv-half.f577e5f4e1.ll (mutant of calling-conv-half.ll)caller_half_ret-mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs
lrint-conv.fc60be001d.ll (mutant of lrint-conv.ll)test_llrint_ixx_f128-mtriple=riscv32
lrint-conv.fc60be001d.ll (mutant of lrint-conv.ll)test_llrint_ixx_f128-mtriple=riscv32
scmp.8a477d7b69.ll (mutant of scmp.ll)scmp.64.64-mtriple=riscv32
shadow-stack-frame-opts.2e289ba3ee.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv32 -mattr=+zimop
shadow-stack-frame-opts.46ea65d136.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv32 -mattr=+zimop,+zcmp
shadow-stack-frame-opts.5f40f5ebeb.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv32 -mattr=+zimop,+zcmp,+save-restore
shadow-stack-frame-opts.6aa01b7ade.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv32 -mattr=+zimop,+xqccmp
shadow-stack-frame-opts.c4469b9799.ll (mutant of shadow-stack-frame-opts.ll)caller_hw_fp-mtriple=riscv32 -mattr=+zimop,+save-restore
shl-cttz.1604faec08.ll (mutant of shl-cttz.ll)shl_cttz_multiuse_i32-mtriple=riscv32 -mattr=+m
shl-cttz.f7335dc251.ll (mutant of shl-cttz.ll)shl_cttz_multiuse_i32-mtriple=riscv32 -mattr=+m,+zbb
short-forward-branch-opt-min-max.5efdc564f9.ll (mutant of short-forward-branch-opt-min-max.ll)select_example_umin_1-mtriple=riscv32 -mattr=+zbb,+short-forward-branch-ialu
short-forward-branch-opt-min-max.9afbfdb6e3.ll (mutant of short-forward-branch-opt-min-max.ll)select_example_umin_1-mtriple=riscv32 -mattr=+zbb
short-forward-branch-opt-min-max.d327e6199d.ll (mutant of short-forward-branch-opt-min-max.ll)select_example_umin_1-mtriple=riscv32 -mattr=+zbb,+short-forward-branch-iminmax
split-store.9c9ce14865.ll (mutant of split-store.ll)mbb_int32_float_pair-mtriple=riscv32 -mattr=+d -verify-machineinstrs
split-store.dde192f8fc.ll (mutant of split-store.ll)mbb_int32_float_pair-mtriple=riscv32 -verify-machineinstrs
ucmp.e08aa11607.ll (mutant of ucmp.ll)ucmp.32.32_zext-mtriple=riscv32
xqcibm-insbi.94def88843.ll (mutant of xqcibm-insbi.ll)tgt2_insb_neg-mtriple=riscv32 --verify-machineinstrs
xqcibm-insbi.d651aa1083.ll (mutant of xqcibm-insbi.ll)tgt2_insb_neg-mtriple=riscv32 -mattr=+xqcibm --verify-machineinstrs
xqcilo.5241c51396.ll (mutant of xqcilo.ll)sw_ri-mtriple=riscv32 -mattr=+xqcilo -verify-machineinstrs
xqcilo.6373019ad4.ll (mutant of xqcilo.ll)sw_ri-mtriple=riscv32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.