fallback: legalize: G_INSERT_VECTOR_ELT <32 x s16>,s16,s64

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_INSERT_VECTOR_ELT <32 x s16>,s16,s64 NEW
Occurrences:3 in 3 configs, 1 test files
Snippet from:fastcc-without-f-reg.033abf3cfb.ll (mutant of fastcc-without-f-reg.ll) @callee_half_32 via llvm-extract + llvm-reduce
Config:-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:https://godbolt.org/z/dYc1v7cce (llc-assertions-trunk, checked 2026-10-14 11:50 UTC): G reproduces

Snippet:

define fastcc <32 x half> @callee_half_32(<32 x half> %A) {
  %I = insertelement <32 x half> %A, half 0.000000e+00, i64 0
  ret <32 x half> %I
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*062remark: <unknown>:0:0: unable to legalize instruction: %56:_(<32 x s16>) = G_INSERT_VECTOR_ELT %0:_, %57:_(s16), %58:_(s64) (in function: callee_half_32)
warning: Instruction selection used fallback path for callee_half_32
SelectionDAG (control)-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -global-isel=0062-

Reproduce:

llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %56:_(<32 x s16>) = G_INSERT_VECTOR_ELT %0:_, %57:_(s16), %58:_(s64) (in function: callee_half_32)
warning: Instruction selection used fallback path for callee_half_32

Occurrences (3):

InputFunctionConfig
fastcc-without-f-reg.033abf3cfb.ll (mutant of fastcc-without-f-reg.ll)callee_half_32-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs
fastcc-without-f-reg.23c302bc7b.ll (mutant of fastcc-without-f-reg.ll)callee_half_32-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs
fastcc-without-f-reg.3753509050.ll (mutant of fastcc-without-f-reg.ll)callee_half_32-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.