fallback: legalize: G_INSERT_VECTOR_ELT <4 x s16>,s16,s64

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_INSERT_VECTOR_ELT <4 x s16>,s16,s64
Occurrences:2 in 1 configs, 1 test files
Snippet from:rvp-simd-64.ll @test_insert_vector_16 via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i16> @test_insert_vector_16(<4 x i16> %a, i16 %val) {
  %res = insertelement <4 x i16> %a, i16 %val, i32 0
  ret <4 x i16> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(<4 x s16>) = G_INSERT_VECTOR_ELT %0:_, %1:_(s16), %4:_(s64) (in function: test_insert_vector_16)
warning: Instruction selection used fallback path for test_insert_vector_16

Occurrences (2):

InputFunctionConfig
rvp-simd-64.lltest_insert_vector_16-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_insert_vector_16_elem2-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.