| Input | Function | Config |
|---|
| rvp-simd-64.ll | test_pmqacc_h00_i32x2 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmqacc_h01_i32x2 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmqacc_h11_i32x2 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmqracc_h00_i32x2 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmqracc_h01_i32x2 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmqracc_h11_i32x2 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmul_h00_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmul_h01_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmul_h11_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulu_h00_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulu_h01_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulu_h11_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulsu_h00_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulsu_h11_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2add_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2add_x_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2addu_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmq2add_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmqr2add_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2sadd_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2sadd_x_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2sub_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2sub_x_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pm2addsu_v4i16_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmacc_h00_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmacc_h01_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmacc_h11_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmaccu_h00_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmaccu_h01_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmaccu_h11_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmaccsu_h00_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmaccsu_h11_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmhacc_h0_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmhacc_h1_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmhaccsu_h0_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmhaccsu_h1_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulh_h0_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulh_h1_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulhsu_h0_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
| rvp-simd-64.ll | test_pmulhsu_h1_v2i32 | -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs |
Generated 2026-10-15 08:05 UTC.