fallback: legalize: G_LOAD <2 x s32>,p0

Run:	explore-04ca53e65f-20261014-114124
Kind:	fallback
Category:	legalize: G_LOAD <2 x s32>,p0
Occurrences:	26 in 4 configs, 1 test files
Snippet from:	rvp-unaligned-load-store.ll @test_store_v2i32_align1 via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+experimental-p`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define void @test_store_v2i32_align1(ptr %a_ptr, ptr %b_ptr) {
  %a = load <2 x i32>, ptr %a_ptr, align 8
  store <2 x i32> %a, ptr %b_ptr, align 1
  ret void
}

Reproduce:

llc -mtriple=riscv32 -mattr=+experimental-p -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+experimental-p -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<2 x s32>) = G_LOAD %0:_(p0) :: (load (<2 x s32>) from %ir.a_ptr) (in function: test_store_v2i32_align1)
warning: Instruction selection used fallback path for test_store_v2i32_align1

Occurrences (26):

Input	Function	Config
rvp-unaligned-load-store.ll	test_store_v2i32_align1	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v2i32_align2	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v2i32_align4	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_load_v2i32_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v2i32_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v2i32_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v2i32_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v2i32_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v2i32_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v2i32_align1	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v2i32_align2	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v2i32_align4	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_load_v2i32_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v2i32_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v2i32_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v2i32_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v2i32_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v2i32_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.0c90dffe94.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.0c90dffe94.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.17b509cb6a.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align1	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.17b509cb6a.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align4	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.5ccfcd6462.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.5ccfcd6462.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.9d56d34da7.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align1	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.9d56d34da7.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v2i32_align4	`-mtriple=riscv32 -mattr=+experimental-p`

Generated 2026-10-15 08:05 UTC.