fallback: legalize: G_LOAD <4 x s32>,p0

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_LOAD <4 x s32>,p0
Occurrences:87 in 31 configs, 14 test files
Snippet from:nontemporal.ll @test_nontemporal_load_v4i32 via llvm-extract
Config:-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i32> @test_nontemporal_load_v4i32(ptr %p) {
  %1 = load <4 x i32>, ptr %p, align 16, !nontemporal !0
  ret <4 x i32> %1
}

!0 = !{i32 1}

Reproduce:

llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<4 x s32>) = G_LOAD %0:_(p0) :: (non-temporal "riscv-nontemporal-domain-bit-0" "riscv-nontemporal-domain-bit-1" load (<4 x s32>) from %ir.p) (in function: test_nontemporal_load_v4i32)
warning: Instruction selection used fallback path for test_nontemporal_load_v4i32

Occurrences (87) (first 50):

InputFunctionConfig
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv32 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh
nontemporal.lltest_nontemporal_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_P1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_PALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_S1_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_load_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
nontemporal.lltest_nontemporal_ALL_store_v4i32-mtriple=riscv64 -mattr=+zihintntl,+f,+d,+zfh,+c
tlsdesc-clobber-vector.lltest_vector_csr_clobber-mtriple=riscv32 -mattr=+v -relocation-model=pic -enable-tlsdesc
tlsdesc-clobber-vector.lltest_vector_csr_clobber-mtriple=riscv64 -mattr=+v -relocation-model=pic -enable-tlsdesc
double-arith.034b96dd65.ll (mutant of double-arith.ll)fsgnjn_d-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
double-arith.15fc0307e5.ll (mutant of double-arith.ll)fsgnjn_d-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
float-arith.63d0ff97ec.ll (mutant of float-arith.ll)fsgnjn_s-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
float-arith.ae2ff8fd11.ll (mutant of float-arith.ll)fsgnjn_s-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f
float-arith.d9e511ae37.ll (mutant of float-arith.ll)fsgnjn_s-mtriple=riscv32 -verify-machineinstrs
float-arith.fa50e5f7b1.ll (mutant of float-arith.ll)fsgnjn_s-mtriple=riscv64 -verify-machineinstrs
imm.2375cf169d.ll (mutant of imm.ll)imm_right_shifted_addi-mtriple=riscv64 -riscv-constant-pool-for-large-ints=0 -mattr=+xtheadbb -verify-machineinstrs
imm.261b7ef4bb.ll (mutant of imm.ll)imm_right_shifted_addi-mtriple=riscv64 -riscv-constant-pool-for-large-ints=0 -mattr=+zbb -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.