fallback: legalize: G_LOAD <8 x s8>,p0

Run:	explore-04ca53e65f-20261014-114124
Kind:	fallback
Category:	legalize: G_LOAD <8 x s8>,p0
Occurrences:	55 in 15 configs, 10 test files
Snippet from:	rvp-unaligned-load-store.ll @test_store_v4i8_align1 via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+experimental-p`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define void @test_store_v4i8_align1(ptr %a_ptr, ptr %b_ptr) {
  %a = load <8 x i8>, ptr %a_ptr, align 8
  store <8 x i8> %a, ptr %b_ptr, align 1
  ret void
}

Reproduce:

llc -mtriple=riscv32 -mattr=+experimental-p -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+experimental-p -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<8 x s8>) = G_LOAD %0:_(p0) :: (load (<8 x s8>) from %ir.a_ptr) (in function: test_store_v4i8_align1)
warning: Instruction selection used fallback path for test_store_v4i8_align1

Occurrences (55) (first 50):

Input	Function	Config
rvp-unaligned-load-store.ll	test_store_v4i8_align1	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i8_align2	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i8_align4	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v8i8_align1	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v8i8_align2	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_load_v4i8_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i8_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i8_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i8_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i8_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i8_align4	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v8i8_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v8i8_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v8i8_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v8i8_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i8_align1	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i8_align2	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v4i8_align4	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v8i8_align1	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_store_v8i8_align2	`-mtriple=riscv64 -mattr=+experimental-p`
rvp-unaligned-load-store.ll	test_load_v4i8_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i8_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i8_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i8_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v4i8_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v4i8_align4	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v8i8_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v8i8_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_load_v8i8_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.ll	test_store_v8i8_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
jumptable-section.15ae2daff9.ll (mutant of jumptable-section.ll)	jt	`-mtriple=riscv64 -code-model=large -function-sections`
jumptable-section.8d3335fed6.ll (mutant of jumptable-section.ll)	jt	`-mtriple=riscv64 -code-model=small`
jumptable-section.962b0b2491.ll (mutant of jumptable-section.ll)	jt	`-mtriple=riscv64 -code-model=medium`
jumptable-section.c083323ea1.ll (mutant of jumptable-section.ll)	jt	`-mtriple=riscv64 -code-model=large`
module-asm-features.2153460f65.ll (mutant of module-asm-features.ll)	f	`-mtriple=riscv64-unknown-linux-gnu -mattr=+d`
module-asm-features.91fabe0907.ll (mutant of module-asm-features.ll)	f	`-mtriple=riscv64-unknown-linux-gnu`
note-gnu-property-zicfilp-unlabeled.1d12fa2c39.ll (mutant of note-gnu-property-zicfilp-unlabeled.ll)	f	`--mtriple=riscv32`
note-gnu-property-zicfilp-unlabeled.6a6f78a88f.ll (mutant of note-gnu-property-zicfilp-unlabeled.ll)	f	`--mtriple=riscv64`
relative-reloc.329d4e73cf.ll (mutant of relative-reloc.ll)	f	`-mtriple=riscv64`
rvp-unaligned-load-store.140aa81b6c.ll (mutant of rvp-unaligned-load-store.ll)	test_load_v8i8_align2	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.276df6a766.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i8_align1	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.783af200c9.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i8_align1	`-mtriple=riscv32 -mattr=+experimental-p`
rvp-unaligned-load-store.959b81f567.ll (mutant of rvp-unaligned-load-store.ll)	test_load_v8i8_align2	`-mtriple=riscv32 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.a49cbed587.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i8_align1	`-mtriple=riscv64 -mattr=+experimental-p,+unaligned-scalar-mem`
rvp-unaligned-load-store.e61b985965.ll (mutant of rvp-unaligned-load-store.ll)	test_store_v4i8_align1	`-mtriple=riscv64 -mattr=+experimental-p`
sdata-limit-0.e36ecf73e2.ll (mutant of sdata-limit-0.ll)	f	`-mtriple=riscv32`
sdata-limit-0.ffa8f8e103.ll (mutant of sdata-limit-0.ll)	f	`-mtriple=riscv64`
sdata-limit-4.3d933890c4.ll (mutant of sdata-limit-4.ll)	f	`-mtriple=riscv64`
sdata-limit-4.e3d712308c.ll (mutant of sdata-limit-4.ll)	f	`-mtriple=riscv32`
sdata-limit-8.4339b4fc83.ll (mutant of sdata-limit-8.ll)	f	`-mtriple=riscv32`

Generated 2026-10-15 08:05 UTC.