fallback: legalize: G_MERGE_VALUES s64,s32

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_MERGE_VALUES s64,s32
Occurrences:41 in 6 configs, 4 test files
Snippet from:overflow-intrinsics.ll @uaddo_i42_increment_illegal_type via llvm-extract
Config:-mtriple=riscv32 -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define i1 @uaddo_i42_increment_illegal_type(i42 %x, ptr %p) {
  %a = add i42 %x, 1
  %ov = icmp eq i42 %a, 0
  store i42 %a, ptr %p, align 4
  ret i1 %ov
}

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %20:_(s64) = G_MERGE_VALUES %25:_(s32), %26:_(s32) (in function: uaddo_i42_increment_illegal_type)
warning: Instruction selection used fallback path for uaddo_i42_increment_illegal_type

Occurrences (41):

InputFunctionConfig
inline-asm-zdinx-constraint-r.llconstraint_r_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
inline-asm-zdinx-constraint-r.llconstraint_cr_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
inline-asm-zdinx-constraint-r.llconstraint_f_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
inline-asm-zdinx-constraint-r.llconstraint_cf_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
overflow-intrinsics.lluaddo_i42_increment_illegal_type-mtriple=riscv32 -verify-machineinstrs
xaluo.llsaddo.select.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.llsaddo.not.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.lluaddo.select.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.lluaddo.not.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.llssubo.select.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.llssub.not.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.llsaddo.br.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.lluaddo.br.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.llssubo.br.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.llumulo2.br.i64-mtriple=riscv32 -mattr=+m -verify-machineinstrs
xaluo.llsaddo.select.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.llsaddo.not.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.lluaddo.select.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.lluaddo.not.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.llssubo.select.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.llssub.not.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.llsaddo.br.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.lluaddo.br.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.llssubo.br.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.llumulo2.br.i64-mtriple=riscv32 -mattr=+m,+zba -verify-machineinstrs
xaluo.llsaddo.select.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.llsaddo.not.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.lluaddo.select.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.lluaddo.not.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.llssubo.select.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.llssub.not.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.llsaddo.br.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.lluaddo.br.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.llssubo.br.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
xaluo.llumulo2.br.i64-mtriple=riscv32 -mattr=+m,+zicond -verify-machineinstrs
inline-asm-zdinx-constraint-r.16574e2461.ll (mutant of inline-asm-zdinx-constraint-r.ll)constraint_r_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
inline-asm-zdinx-constraint-r.303f3684a7.ll (mutant of inline-asm-zdinx-constraint-r.ll)constraint_f_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
inline-asm-zdinx-constraint-r.9a6d92e602.ll (mutant of inline-asm-zdinx-constraint-r.ll)constraint_cf_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
inline-asm-zdinx-constraint-r.af40bd761e.ll (mutant of inline-asm-zdinx-constraint-r.ll)constraint_r_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
inline-asm-zdinx-constraint-r.cb06c15d19.ll (mutant of inline-asm-zdinx-constraint-r.ll)constraint_cr_double-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
zdinx-asm-constraint.29ee1b0f13.ll (mutant of zdinx-asm-constraint.ll)zdinx_asm_cR_inout-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 -mattr=+zhinx

Generated 2026-10-15 08:05 UTC.