fallback: legalize: G_MUL <4 x s16>

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:legalize: G_MUL <4 x s16>
Occurrences:13 in 5 configs, 5 test files
Snippet from:rvp-simd-64.ll @test_pmul_h via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i16> @test_pmul_h(<4 x i16> %a, <4 x i16> %b) {
  %res = mul <4 x i16> %a, %b
  ret <4 x i16> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(<4 x s16>) = G_MUL %0:_, %1:_ (in function: test_pmul_h)
warning: Instruction selection used fallback path for test_pmul_h

Occurrences (13):

InputFunctionConfig
rvp-simd-32.lltest_pwmul_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_pwmulu_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-32.lltest_pwmulsu_b-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmul_h-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-widening-convert.57cfd69c23.ll (mutant of rvp-widening-convert.ll)test_pwcvt_v4i8-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
srem-vector-lkk.3dad909432.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv64 -mattr=+m -verify-machineinstrs
srem-vector-lkk.89f6620cb9.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv32 -verify-machineinstrs
srem-vector-lkk.a4bf9ecf02.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv64 -verify-machineinstrs
srem-vector-lkk.e0083009ad.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv32 -mattr=+m -verify-machineinstrs
urem-vector-lkk.4a0f1e0a2c.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv32 -verify-machineinstrs
urem-vector-lkk.59ce91cab3.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv64 -verify-machineinstrs
urem-vector-lkk.6f2768d3af.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv64 -mattr=+m -verify-machineinstrs
urem-vector-lkk.99c173e3df.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv32 -mattr=+m -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.