fallback: legalize: G_SELECT <8 x s8>,<8 x s1>

Run:	explore-04ca53e65f-20261014-114124
Kind:	fallback
Category:	legalize: G_SELECT <8 x s8>,<8 x s1>
Occurrences:	11 in 2 configs, 2 test files
Snippet from:	combine-storetomstore.ll @test_masked_store_success_v8i8 via llvm-extract
Config:	`-mtriple=riscv64-- -mattr=+m,+v,+f`
Local check:	reproduces at 04ca53e65f
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define void @test_masked_store_success_v8i8(<8 x i8> %x, ptr %ptr, <8 x i1> %mask) {
  %load = load <8 x i8>, ptr %ptr, align 32
  %sel = select <8 x i1> %mask, <8 x i8> %x, <8 x i8> %load
  store <8 x i8> %sel, ptr %ptr, align 32
  ret void
}

Reproduce:

llc -mtriple=riscv64-- -mattr=+m,+v,+f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64-- -mattr=+m,+v,+f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %6:_(<8 x s8>) = G_SELECT %2:_(<8 x s1>), %0:_, %5:_ (in function: test_masked_store_success_v8i8)
warning: Instruction selection used fallback path for test_masked_store_success_v8i8

Occurrences (11):

Input	Function	Config
combine-storetomstore.ll	test_masked_store_success_v8i8	`-mtriple=riscv64-- -mattr=+m,+v,+f`
rvp-simd-64.ll	test_psadd_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_psaddu_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pssub_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_pssubu_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_psslai_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_smin_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_umin_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_smax_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_umax_b	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`
rvp-simd-64.ll	test_vselect_v8i8	`-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.