| Input | Function | Config |
|---|
| combine-storetomstore.a4a532a88e.ll (mutant of combine-storetomstore.ll) | test_masked_store_success_v32i16 | -mtriple=riscv64-- -mattr=+m,+v,+f |
| double_reduct.3844ced8ae.ll (mutant of double_reduct.ll) | add_ext_v32i16 | -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs |
| double_reduct.5fd21faeb6.ll (mutant of double_reduct.ll) | add_ext_v32i16 | -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d -verify-machineinstrs |
| double_reduct.799e3b7e5f.ll (mutant of double_reduct.ll) | add_ext_v32i16 | -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs |
| double_reduct.d6d255ac6c.ll (mutant of double_reduct.ll) | add_ext_v32i16 | -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d -verify-machineinstrs |
| fastcc-without-f-reg.1946ee5744.ll (mutant of fastcc-without-f-reg.ll) | callee_float_32 | -mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs |
| fastcc-without-f-reg.1a8586865f.ll (mutant of fastcc-without-f-reg.ll) | callee_float_32 | -mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs |
| fastcc-without-f-reg.3ae3d55e73.ll (mutant of fastcc-without-f-reg.ll) | callee_float_32 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs |
| fastcc-without-f-reg.50437c72e2.ll (mutant of fastcc-without-f-reg.ll) | callee_float_32 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs |
| fastcc-without-f-reg.cd513577e5.ll (mutant of fastcc-without-f-reg.ll) | callee_float_32 | -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs |
| fastcc-without-f-reg.d2f3727de3.ll (mutant of fastcc-without-f-reg.ll) | callee_float_32 | -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs |
Generated 2026-10-15 08:05 UTC.