fallback: translate: call llvm.experimental.constrained.fptosi.i32.f32

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:translate: call llvm.experimental.constrained.fptosi.i32.f32
Occurrences:26 in 9 configs, 3 test files
Snippet from:float-convert-strict.ll @fcvt_w_s via llvm-extract
Config:-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define i32 @fcvt_w_s(float %a) #0 {
  %1 = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %a, metadata !"fpexcept.strict")
  ret i32 %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare i32 @llvm.experimental.constrained.fptosi.i32.f32(float, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }

Reproduce:

llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: call llvm.experimental.constrained.fptosi.i32.f32: '  %1 = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %a, metadata !"fpexcept.strict")' (in function: fcvt_w_s)
warning: Instruction selection used fallback path for fcvt_w_s

Occurrences (26):

InputFunctionConfig
float-convert-strict.llfcvt_w_s-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
float-convert-strict.llfcvt_w_s-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
float-convert-strict.llfcvt_w_s-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.llfcvt_w_s-mtriple=riscv64 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64f
float-convert-strict.llfcvt_w_s-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
float-convert-strict.llfcvt_w_s-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llaext_fptosi-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llsext_fptosi-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llzext_fptosi-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llaext_fptosi-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llsext_fptosi-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.llzext_fptosi-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64i-single-softfloat.llstrict_fp32_to_si32-mtriple=riscv64 -verify-machineinstrs
float-convert-strict.405bac1c04.ll (mutant of float-convert-strict.ll)fcvt_w_s-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64
float-convert-strict.57152036d0.ll (mutant of float-convert-strict.ll)fcvt_w_s-mtriple=riscv64 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64f
float-convert-strict.685257ec2c.ll (mutant of float-convert-strict.ll)fcvt_w_s-mtriple=riscv32 -mattr=+f -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32f
float-convert-strict.7a6a53b16e.ll (mutant of float-convert-strict.ll)fcvt_w_s-mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation
float-convert-strict.a5231b48da.ll (mutant of float-convert-strict.ll)fcvt_w_s-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32
float-convert-strict.d4e7fcbc6a.ll (mutant of float-convert-strict.ll)fcvt_w_s-mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.10408038bb.ll (mutant of rv64f-float-convert-strict.ll)sext_fptosi-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.3647adcfeb.ll (mutant of rv64f-float-convert-strict.ll)aext_fptosi-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.3e3a44de38.ll (mutant of rv64f-float-convert-strict.ll)sext_fptosi-mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs -disable-strictnode-mutation
rv64f-float-convert-strict.61a4defe3e.ll (mutant of rv64f-float-convert-strict.ll)aext_fptosi-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs -disable-strictnode-mutation
rv64i-single-softfloat.2ead25e3d0.ll (mutant of rv64i-single-softfloat.ll)strict_fp32_to_si32-mtriple=riscv64 -verify-machineinstrs
rv64i-single-softfloat.67c2156040.ll (mutant of rv64i-single-softfloat.ll)strict_fp32_to_si32-mtriple=riscv64 -verify-machineinstrs
rv64i-single-softfloat.c025a4951c.ll (mutant of rv64i-single-softfloat.ll)strict_fp32_to_si32-mtriple=riscv64 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.