| Input | Function | Config |
|---|
| double-convert-strict.ll | fcvt_wu_d | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d |
| double-convert-strict.ll | fcvt_wu_d_multiple_use | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d |
| double-convert-strict.ll | fcvt_wu_d | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32 |
| double-convert-strict.ll | fcvt_wu_d_multiple_use | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32 |
| double-convert-strict.ll | fcvt_wu_d | -mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation |
| double-convert-strict.ll | fcvt_wu_d_multiple_use | -mtriple=riscv32 -verify-machineinstrs -disable-strictnode-mutation |
| double-convert-strict.ll | fcvt_wu_d | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64d |
| double-convert-strict.ll | fcvt_wu_d_multiple_use | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64d |
| double-convert-strict.ll | fcvt_wu_d | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64 |
| double-convert-strict.ll | fcvt_wu_d_multiple_use | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64 |
| double-convert-strict.ll | fcvt_wu_d | -mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation |
| double-convert-strict.ll | fcvt_wu_d_multiple_use | -mtriple=riscv64 -verify-machineinstrs -disable-strictnode-mutation |
| rv64d-double-convert-strict.ll | aext_fptoui | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation |
| rv64d-double-convert-strict.ll | sext_fptoui | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation |
| rv64d-double-convert-strict.ll | zext_fptoui | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation |
| rv64d-double-convert-strict.ll | aext_fptoui | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation |
| rv64d-double-convert-strict.ll | sext_fptoui | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation |
| rv64d-double-convert-strict.ll | zext_fptoui | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation |
| rv64i-double-softfloat.ll | strict_fp64_to_ui32 | -mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs |
| rv64i-double-softfloat.ll | strict_fp64_to_ui32 | -mtriple=riscv64 -verify-machineinstrs |
| rv64d-double-convert-strict.010a27ffb0.ll (mutant of rv64d-double-convert-strict.ll) | sext_fptoui | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d -disable-strictnode-mutation |
| rv64d-double-convert-strict.deed04a297.ll (mutant of rv64d-double-convert-strict.ll) | sext_fptoui | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 -disable-strictnode-mutation |
| rv64i-double-softfloat.6d5436baa4.ll (mutant of rv64i-double-softfloat.ll) | strict_fp64_to_ui32 | -mtriple=riscv64 -verify-machineinstrs |
| rv64i-double-softfloat.910d5b42a6.ll (mutant of rv64i-double-softfloat.ll) | strict_fp64_to_ui32 | -mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs |
| rv64i-double-softfloat.94011de8ce.ll (mutant of rv64i-double-softfloat.ll) | strict_fp64_to_ui32 | -mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs |
| rv64i-double-softfloat.a77ae2cf59.ll (mutant of rv64i-double-softfloat.ll) | strict_fp64_to_ui32 | -mtriple=riscv64 -verify-machineinstrs |
| rv64i-double-softfloat.b7c3706066.ll (mutant of rv64i-double-softfloat.ll) | strict_fp64_to_ui32 | -mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs |
| rv64i-double-softfloat.bd279f4fbd.ll (mutant of rv64i-double-softfloat.ll) | strict_fp64_to_ui32 | -mtriple=riscv64 -verify-machineinstrs |
Generated 2026-10-15 08:05 UTC.