fallback: translate: call llvm.experimental.constrained.fptoui.i32.f16

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:translate: call llvm.experimental.constrained.fptoui.i32.f16
Occurrences:50 in 17 configs, 3 test files
Snippet from:half-convert-strict.ll @fcvt_wu_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define i32 @fcvt_wu_h(half %a) #0 {
  %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %a, metadata !"fpexcept.strict")
  ret i32 %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare i32 @llvm.experimental.constrained.fptoui.i32.f16(half, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: call llvm.experimental.constrained.fptoui.i32.f16: '  %1 = call i32 @llvm.experimental.constrained.fptoui.i32.f16(half %a, metadata !"fpexcept.strict")' (in function: fcvt_wu_h)
warning: Instruction selection used fallback path for fcvt_wu_h

Occurrences (50):

InputFunctionConfig
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+zdinx,+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
half-convert-strict.llfcvt_wu_h_multiple_use-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfh-half-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
rv64zfh-half-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
rv64zfh-half-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
rv64zfh-half-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfh-half-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfh-half-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.llaext_fptoui-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.llsext_fptoui-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.llzext_fptoui-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfh-half-convert-strict.0fba976247.ll (mutant of rv64zfh-half-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
rv64zfh-half-convert-strict.86b87c420d.ll (mutant of rv64zfh-half-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.ca202d24aa.ll (mutant of rv64zfhmin-half-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
rv64zfhmin-half-convert-strict.d4731cf4a0.ll (mutant of rv64zfhmin-half-convert-strict.ll)sext_fptoui-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation

Generated 2026-10-15 08:05 UTC.