fallback: translate: call llvm.experimental.constrained.lrint.i64.f16

Run:explore-04ca53e65f-20261014-114124
Kind:fallback
Category:translate: call llvm.experimental.constrained.lrint.i64.f16
Occurrences:24 in 8 configs, 2 test files
Snippet from:zfh-half-intrinsics-strict.ll @lrint_f16 via llvm-extract
Config:-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind strictfp
define i64 @lrint_f16(half %a) #0 {
  %1 = call i64 @llvm.experimental.constrained.lrint.i64.f16(half %a, metadata !"round.dynamic", metadata !"fpexcept.strict") #2
  ret i64 %1
}

; Function Attrs: nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
declare i64 @llvm.experimental.constrained.lrint.i64.f16(half, metadata, metadata) #1

attributes #0 = { nounwind strictfp }
attributes #1 = { nocallback nofree nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite) }
attributes #2 = { strictfp }

Reproduce:

llc -mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to translate instruction: call llvm.experimental.constrained.lrint.i64.f16: '  %1 = call i64 @llvm.experimental.constrained.lrint.i64.f16(half %a, metadata !"round.dynamic", metadata !"fpexcept.strict") #2' (in function: lrint_f16)
warning: Instruction selection used fallback path for lrint_f16

Occurrences (24):

InputFunctionConfig
zfh-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
zfh-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64
zfh-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
zfh-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
zfhmin-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.lllrint_f16-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
zfh-half-intrinsics-strict.0f238f08c8.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
zfh-half-intrinsics-strict.1cae587e7a.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64
zfh-half-intrinsics-strict.303042f7c8.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
zfh-half-intrinsics-strict.44957f6306.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
zfh-half-intrinsics-strict.825b94139c.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
zfh-half-intrinsics-strict.8e70568abc.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
zfh-half-intrinsics-strict.97f7a4f70c.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinx -verify-machineinstrs -target-abi lp64
zfh-half-intrinsics-strict.eb2ab56073.ll (mutant of zfh-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.1c961391e1.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
zfhmin-half-intrinsics-strict.7885adfdf1.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.8d22bd9c2f.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.a6b2e8e36d.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zdinx -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
zfhmin-half-intrinsics-strict.b8ae22221e.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.bc99a30a04.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.f36133ce83.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f -disable-strictnode-mutation
zfhmin-half-intrinsics-strict.f4d41ec189.ll (mutant of zfhmin-half-intrinsics-strict.ll)lrint_f16-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 -disable-strictnode-mutation

Generated 2026-10-15 08:05 UTC.