regression: +56 insts: memset_zero_64 (memset-inline.ll)

Run:explore-04ca53e65f-20261014-114124
Kind:regression
Category:+56 insts: memset_zero_64 (memset-inline.ll)
Occurrences:1 in 1 configs, 1 test files
Snippet from:memset-inline.ll @memset_zero_64 via llvm-extract
Config:-mtriple=riscv64 -mattr=+m,+unaligned-scalar-mem
Local check:reproduces at 04ca53e65f
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define void @memset_zero_64(ptr %a) #0 {
  tail call void @llvm.memset.inline.p0.i64(ptr %a, i8 0, i64 64, i1 false)
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: write)
declare void @llvm.memset.inline.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) }

Reproduce:

llc -mtriple=riscv64 -mattr=+m,+unaligned-scalar-mem -global-isel snippet.ll -o -
llc -mtriple=riscv64 -mattr=+m,+unaligned-scalar-mem -global-isel=0 snippet.ll -o -

Assembly diff (SelectionDAG vs GlobalISel):

--- sdag
+++ gisel
@@ -1,9 +1,65 @@
-sd zero, 32(a0)
-sd zero, 40(a0)
-sd zero, 48(a0)
-sd zero, 56(a0)
-sd zero, 0(a0)
-sd zero, 8(a0)
-sd zero, 16(a0)
-sd zero, 24(a0)
+sb zero, 0(a0)
+sb zero, 1(a0)
+sb zero, 2(a0)
+sb zero, 3(a0)
+sb zero, 4(a0)
+sb zero, 5(a0)
+sb zero, 6(a0)
+sb zero, 7(a0)
+sb zero, 8(a0)
+sb zero, 9(a0)
+sb zero, 10(a0)
+sb zero, 11(a0)
+sb zero, 12(a0)
+sb zero, 13(a0)
+sb zero, 14(a0)
+sb zero, 15(a0)
+sb zero, 16(a0)
+sb zero, 17(a0)
+sb zero, 18(a0)
+sb zero, 19(a0)
+sb zero, 20(a0)
+sb zero, 21(a0)
+sb zero, 22(a0)
+sb zero, 23(a0)
+sb zero, 24(a0)
+sb zero, 25(a0)
+sb zero, 26(a0)
+sb zero, 27(a0)
+sb zero, 28(a0)
+sb zero, 29(a0)
+sb zero, 30(a0)
+sb zero, 31(a0)
+sb zero, 32(a0)
+sb zero, 33(a0)
+sb zero, 34(a0)
+sb zero, 35(a0)
+sb zero, 36(a0)
+sb zero, 37(a0)
+sb zero, 38(a0)
+sb zero, 39(a0)
+sb zero, 40(a0)
+sb zero, 41(a0)
+sb zero, 42(a0)
+sb zero, 43(a0)
+sb zero, 44(a0)
+sb zero, 45(a0)
+sb zero, 46(a0)
+sb zero, 47(a0)
+sb zero, 48(a0)
+sb zero, 49(a0)
+sb zero, 50(a0)
+sb zero, 51(a0)
+sb zero, 52(a0)
+sb zero, 53(a0)
+sb zero, 54(a0)
+sb zero, 55(a0)
+sb zero, 56(a0)
+sb zero, 57(a0)
+sb zero, 58(a0)
+sb zero, 59(a0)
+sb zero, 60(a0)
+sb zero, 61(a0)
+sb zero, 62(a0)
+sb zero, 63(a0)
 ret

Occurrences (1):

InputFunctionConfig
memset-inline.llmemset_zero_64-mtriple=riscv64 -mattr=+m,+unaligned-scalar-mem

Generated 2026-10-15 08:05 UTC.