crash: Assertion failed: (DstTy.isVector() && SrcVecTy.isVector() && "Extract subvector VTs must be vectors!"), function buildInstr, file MachineIRBuilder.cpp

Run:explore-bc8218b282-20261015-075519
Kind:crash
Category:Assertion failed: (DstTy.isVector() && SrcVecTy.isVector() && "Extract subvector VTs must be vectors!"), function buildInstr, file MachineIRBuilder.cpp
Occurrences:12 in 4 configs, 3 test files
Snippet from:inline-asm-fixed-v-constraint.ll @constraint_vr_fixed via llvm-extract + llvm-reduce
Config:-mtriple=riscv32 -mattr=+v -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:https://godbolt.org/z/h179b39Yn (llc-assertions-trunk, checked 2026-10-14 11:03 UTC): G reproduces

Snippet:

define <1 x i8> @constraint_vr_fixed(<1 x i8> %0) {
  ret <1 x i8> %0
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv32 -mattr=+v -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*1340llc: /root/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1512: virtual llvm::MachineInstrBuilder llvm::MachineIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>): Assertion `DstTy.isVector() && SrcVecTy.isVector() && "Extract subvector VTs must be vectors!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
SelectionDAG (control)-mtriple=riscv32 -mattr=+v -verify-machineinstrs -global-isel=001-

Reproduce:

llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

llc: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1513: virtual MachineInstrBuilder llvm::MachineIRBuilder::buildInstr(unsigned int, ArrayRef<DstOp>, ArrayRef<SrcOp>, std::optional<unsigned int>): Assertion `DstTy.isVector() && SrcVecTy.isVector() && "Extract subvector VTs must be vectors!"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0.	Program arguments: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/build/bin/llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* -o -
1.	Running pass 'Function Pass Manager' on module '<stdin>'.
2.	Running pass 'IRTranslator' on function '@constraint_vr_fixed'
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0  llc       0x00005558fd0fb54b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) + 43
1  llc       0x00005558fd0f83f1 llvm::sys::RunSignalHandlers() + 369
2  llc       0x00005558fd0fbfcb
3  libc.so.6 0x00007f5bfd445330
4  libc.so.6 0x00007f5bfd49ec0c pthread_kill + 284
5  libc.so.6 0x00007f5bfd44527e gsignal + 30
6  libc.so.6 0x00007f5bfd4288ff abort + 223
7  libc.so.6 0x00007f5bfd42881b
8  libc.so.6 0x00007f5bfd43b517
9  llc       0x00005558ff25df32 llvm::MachineIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 11506
10 llc       0x00005558ff174f9f llvm::CSEMIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 2991
11 llc       0x00005558ff259c9c llvm::MachineIRBuilder::buildExtractSubvector(llvm::DstOp const&, llvm::SrcOp const&, unsigned int) + 76
12 llc       0x00005558fe31952f
13 llc       0x00005558ff16ad90 llvm::CallLowering::handleAssignments(llvm::CallLowering::ValueHandler&, llvm::SmallVectorImpl<llvm::CallLowering::ArgInfo>&, llvm::CCState&, llvm::SmallVectorImpl<llvm::CCValAssign>&, llvm::MachineIRBuilder&, llvm::ArrayRef<llvm::Register>) const + 928
14 llc       0x00005558fe3166ac
15 llc       0x00005558ff1d7180 llvm::IRTranslatorImpl::runOnMachineFunction(llvm::MachineFunction&, llvm::function_ref<llvm::GISelCSEInfo* ()>, bool, llvm::function_ref<llvm::AAResults* ()>, llvm::function_ref<llvm::BranchProbabilityInfo* ()>, llvm::function_ref<llvm::AssumptionCache* ()>, llvm::TargetLibraryInfo*, llvm::LibcallLoweringInfo const*, llvm::SSPLayoutInfo*) + 3552
16 llc       0x00005558ff1d842d llvm::IRTranslatorLegacy::runOnMachineFunction(llvm::MachineFunction&) + 733
17 llc       0x00005558fd6c29ed llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 653
18 llc       0x00005558fd452d37 llvm::FPPassManager::runOnFunction(llvm::Function&) + 871
19 llc       0x00005558fd45b232 llvm::FPPassManager::runOnModule(llvm::Module&) + 50
20 llc       0x00005558fd453ae0 llvm::legacy::PassManagerImpl::run(llvm::Module&) + 2000
21 llc       0x00005558fd102ba8 llcMain + 12056
22 llc       0x00005558fd03d6af main + 63
23 libc.so.6 0x00007f5bfd42a1ca
24 libc.so.6 0x00007f5bfd42a28b __libc_start_main + 139
25 llc       0x00005558fd03d5a5 _start + 37

Occurrences (12):

InputFunctionConfig
inline-asm-fixed-v-constraint.ll-mtriple=riscv32 -mattr=+v -verify-machineinstrs
inline-asm-fixed-v-constraint.ll-mtriple=riscv64 -mattr=+v -verify-machineinstrs
smulh.ll-mtriple=riscv32 -mattr=+m,+v
smulh.ll-mtriple=riscv64 -mattr=+m,+v
umulh.ll-mtriple=riscv32 -mattr=+m,+v
umulh.ll-mtriple=riscv64 -mattr=+m,+v
inline-asm-fixed-v-constraint.69d8724086.ll (mutant of inline-asm-fixed-v-constraint.ll)-mtriple=riscv64 -mattr=+v -verify-machineinstrs
inline-asm-fixed-v-constraint.d7fc1ac6b7.ll (mutant of inline-asm-fixed-v-constraint.ll)-mtriple=riscv32 -mattr=+v -verify-machineinstrs
smulh.c913db1ea1.ll (mutant of smulh.ll)-mtriple=riscv64 -mattr=+m,+v
smulh.f5e3ef9f10.ll (mutant of smulh.ll)-mtriple=riscv32 -mattr=+m,+v
umulh.5f9fd60a1a.ll (mutant of umulh.ll)-mtriple=riscv64 -mattr=+m,+v
umulh.649458fa87.ll (mutant of umulh.ll)-mtriple=riscv32 -mattr=+m,+v

Generated 2026-10-15 08:05 UTC.