crash: Assertion failed: (SrcTy.isVector() && "mismatched cast between vector and non-vector"), function validateTruncExt, file MachineIRBuilder.cpp

Run:explore-bc8218b282-20261015-075519
Kind:crash
Category:Assertion failed: (SrcTy.isVector() && "mismatched cast between vector and non-vector"), function validateTruncExt, file MachineIRBuilder.cpp
Occurrences:12 in 2 configs, 2 test files
Snippet from:calling-conv-vector-float.ll @callee_v2f32 via llvm-extract + llvm-reduce
Config:-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:https://godbolt.org/z/KaW5c63q1 (llc-assertions-trunk, checked 2026-10-14 11:03 UTC): G reproduces

Snippet:

define <2 x float> @callee_v2f32(<2 x float> %x) {
  ret <2 x float> %x
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*1340llc: /root/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1271: void llvm::MachineIRBuilder::validateTruncExt(llvm::LLT, llvm::LLT, bool): Assertion `SrcTy.isVector() && "mismatched cast between vector and non-vector"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
SelectionDAG (control)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel=001-

Reproduce:

llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

llc: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1271: void llvm::MachineIRBuilder::validateTruncExt(const LLT, const LLT, bool): Assertion `SrcTy.isVector() && "mismatched cast between vector and non-vector"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0.	Program arguments: /home/runner/work/llvm-fuzz/llvm-fuzz/llvm-project/build/bin/llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* -o -
1.	Running pass 'Function Pass Manager' on module '<stdin>'.
2.	Running pass 'IRTranslator' on function '@callee_v2f32'
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0  llc       0x0000561930c9054b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) + 43
1  llc       0x0000561930c8d3f1 llvm::sys::RunSignalHandlers() + 369
2  llc       0x0000561930c90fcb
3  libc.so.6 0x00007f9e9e045330
4  libc.so.6 0x00007f9e9e09ec0c pthread_kill + 284
5  libc.so.6 0x00007f9e9e04527e gsignal + 30
6  libc.so.6 0x00007f9e9e0288ff abort + 223
7  libc.so.6 0x00007f9e9e02881b
8  libc.so.6 0x00007f9e9e03b517
9  llc       0x0000561932df0089 llvm::MachineIRBuilder::validateTruncExt(llvm::LLT, llvm::LLT, bool) + 905
10 llc       0x0000561932df0f32 llvm::MachineIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 3314
11 llc       0x0000561932d0a003 llvm::CSEMIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>) + 3091
12 llc       0x0000561932dee9b1 llvm::MachineIRBuilder::buildTrunc(llvm::DstOp const&, llvm::SrcOp const&, std::optional<unsigned int>) + 33
13 llc       0x0000561931eae4ba
14 llc       0x0000561932cffd90 llvm::CallLowering::handleAssignments(llvm::CallLowering::ValueHandler&, llvm::SmallVectorImpl<llvm::CallLowering::ArgInfo>&, llvm::CCState&, llvm::SmallVectorImpl<llvm::CCValAssign>&, llvm::MachineIRBuilder&, llvm::ArrayRef<llvm::Register>) const + 928
15 llc       0x0000561931eab6ac
16 llc       0x0000561932d6c180 llvm::IRTranslatorImpl::runOnMachineFunction(llvm::MachineFunction&, llvm::function_ref<llvm::GISelCSEInfo* ()>, bool, llvm::function_ref<llvm::AAResults* ()>, llvm::function_ref<llvm::BranchProbabilityInfo* ()>, llvm::function_ref<llvm::AssumptionCache* ()>, llvm::TargetLibraryInfo*, llvm::LibcallLoweringInfo const*, llvm::SSPLayoutInfo*) + 3552
17 llc       0x0000561932d6d42d llvm::IRTranslatorLegacy::runOnMachineFunction(llvm::MachineFunction&) + 733
18 llc       0x00005619312579ed llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 653
19 llc       0x0000561930fe7d37 llvm::FPPassManager::runOnFunction(llvm::Function&) + 871
20 llc       0x0000561930ff0232 llvm::FPPassManager::runOnModule(llvm::Module&) + 50
21 llc       0x0000561930fe8ae0 llvm::legacy::PassManagerImpl::run(llvm::Module&) + 2000
22 llc       0x0000561930c97ba8 llcMain + 12056
23 llc       0x0000561930bd26af main + 63
24 libc.so.6 0x00007f9e9e02a1ca
25 libc.so.6 0x00007f9e9e02a28b __libc_start_main + 139
26 llc       0x0000561930bd25a5 _start + 37

Occurrences (12):

InputFunctionConfig
calling-conv-vector-float.ll-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
fastcc-half.ll-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
calling-conv-vector-float.6a7a3e285d.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.6b378e64a5.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.ba5c6559ce.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.c1ef9d224e.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
calling-conv-vector-float.fc6bb1f2e1.ll (mutant of calling-conv-vector-float.ll)-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs
fastcc-half.292e5bf842.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
fastcc-half.88f109dfd0.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
fastcc-half.8b4c0217ab.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
fastcc-half.c2ff8a2eee.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs
fastcc-half.fb0aac9b83.ll (mutant of fastcc-half.ll)-mtriple=riscv32 -mattr=+zfhmin -target-abi=ilp32 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.