fallback: legalize: G_ADD <2 x s64>

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_ADD <2 x s64> NEW
Occurrences:44 in 35 configs, 11 test files
Snippet from:zcb-regalloc-hints.213086492f.ll (mutant of zcb-regalloc-hints.ll) @c_zext_b via llvm-extract + llvm-reduce
Config:-mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb
Local check:reproduces at bc8218b282
Compiler Explorer:https://godbolt.org/z/doqs6TvMr (llc-assertions-trunk, checked 2026-10-15 08:05 UTC): G reproduces

Snippet:

define <2 x i64> @c_zext_b(<2 x i64> %LGV) {
  %B1 = add <2 x i64> zeroinitializer, %LGV
  ret <2 x i64> %B1
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*01remark: <unknown>:0:0: unable to legalize instruction: %5:_(<2 x s64>) = G_ADD %3:_, %0:_ (in function: c_zext_b)
warning: Instruction selection used fallback path for c_zext_b
SelectionDAG (control)-mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb -global-isel=001-

Reproduce:

llc -mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %5:_(<2 x s64>) = G_ADD %3:_, %0:_ (in function: c_zext_b)
warning: Instruction selection used fallback path for c_zext_b

Occurrences (44):

InputFunctionConfig
double-calling-conv.144852ce12.ll (mutant of double-calling-conv.ll)callee_double_stack-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs
double-calling-conv.a6c9219d43.ll (mutant of double-calling-conv.ll)callee_double_stack-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs
double-imm.0f46ea1ae5.ll (mutant of double-imm.ll)negzero_sel-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32
double-imm.365e7bb145.ll (mutant of double-imm.ll)negzero_sel-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64
double-imm.a250c5b724.ll (mutant of double-imm.ll)negzero_sel-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
double-imm.b5c9b34192.ll (mutant of double-imm.ll)negzero_sel-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
float-maximum-minimum.0fb285b9e4.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs -target-abi=ilp32
float-maximum-minimum.41d4082258.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
float-maximum-minimum.6823d70b79.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
float-maximum-minimum.92e18f41eb.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f
float-maximum-minimum.aa094d371f.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv32 -verify-machineinstrs -target-abi=ilp32
float-maximum-minimum.dff92277be.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs -target-abi=lp64
float-maximum-minimum.e2fc4d924e.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv64 -verify-machineinstrs -target-abi=lp64
float-maximum-minimum.f26854a010.ll (mutant of float-maximum-minimum.ll)fminimum_nnan_attr_f32-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32f
fp16-promote.f5472375f5.ll (mutant of fp16-promote.ll)test_fptrunc_double-mtriple=riscv32 -mattr +d -target-abi ilp32d
half-maximum-minimum.28e24b4e5e.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-maximum-minimum.487b4c4c75.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-maximum-minimum.51a249ba36.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.d093b723eb.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-maximum-minimum.d1ab6dab12.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-maximum-minimum.f476c1b6f8.ll (mutant of half-maximum-minimum.ll)fminimum_nnan_attr_f16-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
srem-vector-lkk.2f663d442d.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv32 -mattr=+m -verify-machineinstrs
srem-vector-lkk.43e5512ff0.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv64 -verify-machineinstrs
srem-vector-lkk.8f80c6be1b.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv64 -mattr=+m -verify-machineinstrs
srem-vector-lkk.c39b662e1d.ll (mutant of srem-vector-lkk.ll)dont_fold_srem_one-mtriple=riscv32 -verify-machineinstrs
tagged-globals.3bad1b491e.ll (mutant of tagged-globals.ll)global_int_load-mtriple=riscv64 --relocation-model=pic
tagged-globals.e0414f7dd2.ll (mutant of tagged-globals.ll)global_int_load-mtriple=riscv64 --relocation-model=static
urem-lkk.46badab603.ll (mutant of urem-lkk.ll)dont_fold_urem_one-mtriple=riscv64 -verify-machineinstrs
urem-lkk.51d95b5042.ll (mutant of urem-lkk.ll)dont_fold_urem_one-mtriple=riscv32 -mattr=+m -verify-machineinstrs
urem-lkk.85236a773b.ll (mutant of urem-lkk.ll)dont_fold_urem_one-mtriple=riscv32 -verify-machineinstrs
urem-lkk.949986a9ca.ll (mutant of urem-lkk.ll)dont_fold_urem_one-mtriple=riscv64 -mattr=+m -verify-machineinstrs
urem-vector-lkk.08d2f993ce.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv64 -mattr=+m -verify-machineinstrs
urem-vector-lkk.1d9f056da5.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv64 -verify-machineinstrs
urem-vector-lkk.477e753d91.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv32 -verify-machineinstrs
urem-vector-lkk.69d3452291.ll (mutant of urem-vector-lkk.ll)dont_fold_urem_one-mtriple=riscv32 -mattr=+m -verify-machineinstrs
zcb-regalloc-hints.213086492f.ll (mutant of zcb-regalloc-hints.ll)c_zext_b-mtriple=riscv64 -mattr=+m,+zba,+zbb,+zcb
zicond-fp-select-zfinx.07960fba56.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv64 -mattr=+zhinx,+zicond -verify-machineinstrs
zicond-fp-select-zfinx.2c3aae2c0e.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv64 -mattr=+f,+d -verify-machineinstrs
zicond-fp-select-zfinx.4aa4519758.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv32 -mattr=+zdinx,+zicond -verify-machineinstrs
zicond-fp-select-zfinx.5de506f45a.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv32 -mattr=+zfinx,+zicond -verify-machineinstrs
zicond-fp-select-zfinx.5f887ba1c8.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs
zicond-fp-select-zfinx.a55df7af4e.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs
zicond-fp-select-zfinx.c30a6d0543.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs
zicond-fp-select-zfinx.deafd0ae01.ll (mutant of zicond-fp-select-zfinx.ll)select_i1_f32_0-mtriple=riscv64 -mattr=+zdinx,+zicond -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.