fallback: legalize: G_ASHR <2 x s64>

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_ASHR <2 x s64>
Occurrences:120 in 73 configs, 37 test files
Snippet from:rvp-simd-64.ll @test_paadd_w via llvm-extract
Config:-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <2 x i32> @test_paadd_w(<2 x i32> %a, <2 x i32> %b) {
  %ext.a = sext <2 x i32> %a to <2 x i64>
  %ext.b = sext <2 x i32> %b to <2 x i64>
  %add = add nsw <2 x i64> %ext.a, %ext.b
  %shift = ashr <2 x i64> %add, splat (i64 1)
  %res = trunc <2 x i64> %shift to <2 x i32>
  ret <2 x i32> %res
}

Reproduce:

llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %7:_(<2 x s64>) = G_ASHR %4:_, %5:_(<2 x s64>) (in function: test_paadd_w)
warning: Instruction selection used fallback path for test_paadd_w

Occurrences (120) (first 50):

InputFunctionConfig
rvp-simd-64.lltest_paadd_w-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pasub_w-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
rvp-simd-64.lltest_pmulh_v2i32-mtriple=riscv64 -mattr=+experimental-p,+m,+zbb -verify-machineinstrs
smulh.llsmulh_v2i32-mtriple=riscv32 -mattr=+m
smulh.llsmulh_v2i32-mtriple=riscv64 -mattr=+m
atomic-fence.0b7868540b.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-fence.18c4dc4b45.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-fence.348e746f7f.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-fence.7e9c719ebf.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs
atomic-fence.82526e6da5.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs
atomic-fence.982e24c1c4.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv64 -verify-machineinstrs
atomic-fence.bcd6bca08d.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv32 -verify-machineinstrs
atomic-fence.fb00319273.ll (mutant of atomic-fence.ll)fence_singlethread_acquire-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw-minmax.0ba8ac5eee.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_max_i64_seq_cst-mtriple=riscv64 -mattr=+b,+zalrsc,+permissive-zalrsc,+a -verify-machineinstrs
atomic-rmw-minmax.a42ace664a.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_max_i64_seq_cst-mtriple=riscv32 -mattr=+b,+zalrsc -verify-machineinstrs
atomic-rmw-minmax.aaa51378de.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_max_i64_seq_cst-mtriple=riscv32 -mattr=+b,+zalrsc,+permissive-zalrsc,+a -verify-machineinstrs
atomic-rmw-minmax.d09ddc1e92.ll (mutant of atomic-rmw-minmax.ll)atomicrmw_max_i64_seq_cst-mtriple=riscv32 -mattr=+b,+zalrsc,+permissive-zalrsc -verify-machineinstrs
atomicrmw-cond-sub-clamp.4dab10d681.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i8-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomicrmw-cond-sub-clamp.538ac60a2a.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i8-mtriple=riscv64 -verify-machineinstrs
atomicrmw-cond-sub-clamp.582a79dccb.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i8-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomicrmw-cond-sub-clamp.a477aca649.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i8-mtriple=riscv32 -verify-machineinstrs
atomicrmw-cond-sub-clamp.be5d3b4b55.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i8-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomicrmw-cond-sub-clamp.d5fe058a0e.ll (mutant of atomicrmw-cond-sub-clamp.ll)atomicrmw_usub_sat_i8-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomicrmw-uinc-udec-wrap.419c018e1d.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i8-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomicrmw-uinc-udec-wrap.4475d18658.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i8-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomicrmw-uinc-udec-wrap.63028a46ba.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i8-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomicrmw-uinc-udec-wrap.733834f45e.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i8-mtriple=riscv64 -verify-machineinstrs
atomicrmw-uinc-udec-wrap.ab684ebf84.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i8-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomicrmw-uinc-udec-wrap.c36b1497be.ll (mutant of atomicrmw-uinc-udec-wrap.ll)atomicrmw_udec_wrap_i8-mtriple=riscv32 -verify-machineinstrs
avgceils.1c779ba6eb.ll (mutant of avgceils.ll)test_fixed_i32-mtriple=riscv32 -verify-machineinstrs
avgceils.6e07ee11e5.ll (mutant of avgceils.ll)test_fixed_i32-mtriple=riscv64 -verify-machineinstrs
avgceilu.d1f689ae83.ll (mutant of avgceilu.ll)test_fixed_i32-mtriple=riscv64 -verify-machineinstrs
avgceilu.fbae99eab3.ll (mutant of avgceilu.ll)test_fixed_i32-mtriple=riscv32 -verify-machineinstrs
avgfloors.b9ffc82f8f.ll (mutant of avgfloors.ll)test_fixed_i32-mtriple=riscv64 -verify-machineinstrs
avgfloors.c77ae89ba6.ll (mutant of avgfloors.ll)test_fixed_i32-mtriple=riscv32 -verify-machineinstrs
avgflooru.0787a5d4da.ll (mutant of avgflooru.ll)test_fixed_i32-mtriple=riscv32 -verify-machineinstrs
avgflooru.3d52887ca3.ll (mutant of avgflooru.ll)test_fixed_i32-mtriple=riscv64 -verify-machineinstrs
bfloat.0815a95ed6.ll (mutant of bfloat.ll)i16_to_bfloat-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs
bfloat.237118ad26.ll (mutant of bfloat.ll)i16_to_bfloat-mtriple=riscv32 -verify-machineinstrs
bfloat.2d08511d08.ll (mutant of bfloat.ll)i16_to_bfloat-mtriple=riscv64 -verify-machineinstrs
bfloat.74d2441dae.ll (mutant of bfloat.ll)i16_to_bfloat-mtriple=riscv64 -mattr=+d -target-abi=lp64 -verify-machineinstrs
bfloat.97587c7218.ll (mutant of bfloat.ll)i16_to_bfloat-mtriple=riscv32 -mattr=+d -target-abi=ilp32d -verify-machineinstrs
bfloat.a0ec5047ec.ll (mutant of bfloat.ll)i16_to_bfloat-mtriple=riscv64 -mattr=+d -target-abi=lp64d -verify-machineinstrs
bitreverse-shift.69ce090fc1.ll (mutant of bitreverse-shift.ll)test_bitreverse_shli_bitreverse_i8-mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs
bitreverse-shift.b60228bef3.ll (mutant of bitreverse-shift.ll)test_bitreverse_shli_bitreverse_i8-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs
branch-opt.27bbb225c5.ll (mutant of branch-opt.ll)bset_case1_a-mtriple=riscv64 -mattr=+zbs -O2 -verify-machineinstrs
branch-opt.a2ed1f1505.ll (mutant of branch-opt.ll)bset_case1_a-mtriple=riscv32 -mattr=+zbs -O2 -verify-machineinstrs
calling-conv-half.2acc948e13.ll (mutant of calling-conv-half.ll)callee_half_on_stack_exhausted_gprs_fprs-mtriple=riscv64 -verify-machineinstrs
calling-conv-half.2b9d3c60fc.ll (mutant of calling-conv-half.ll)callee_half_on_stack_exhausted_gprs_fprs-mtriple=riscv32 -mattr=+f -mattr=+zfh -verify-machineinstrs -target-abi ilp32f -O1
calling-conv-half.38a2a7add8.ll (mutant of calling-conv-half.ll)callee_half_on_stack_exhausted_gprs_fprs-mtriple=riscv32 -mattr=+f,+zfhmin -target-abi=ilp32f -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.