fallback: legalize: G_ATOMICRMW

fallback: legalize: G_ATOMICRMW_XOR s32,p0

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_ATOMICRMW_XOR s32,p0
Occurrences:	42 in 6 configs, 3 test files
Snippet from:	forced-atomics.ll @rmw32_xor_seq_cst via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+forced-atomics`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i32 @rmw32_xor_seq_cst(ptr %p) #0 {
  %v = atomicrmw xor ptr %p, i32 1 seq_cst, align 4
  ret i32 %v
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+forced-atomics -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+forced-atomics -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s32) = G_ATOMICRMW_XOR %0:_(p0), %2:_ :: (load store seq_cst (s32) on %ir.p) (in function: rmw32_xor_seq_cst)
warning: Instruction selection used fallback path for rmw32_xor_seq_cst

Occurrences (42):

Input	Function	Config
atomic-rmw.ll	atomicrmw_xor_i8_monotonic	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_acquire	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_release	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_acq_rel	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_seq_cst	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_monotonic	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_acquire	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_release	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_acq_rel	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_seq_cst	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_monotonic	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_acquire	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_release	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_acq_rel	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_seq_cst	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_monotonic	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_acquire	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_release	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_acq_rel	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i8_seq_cst	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_monotonic	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_acquire	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_release	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_acq_rel	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i16_seq_cst	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_monotonic	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_acquire	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_release	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_acq_rel	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-rmw.ll	atomicrmw_xor_i32_seq_cst	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i8_monotonic	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i16_monotonic	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i32_monotonic	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i32_monotonic_crossbb	`-mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i8_monotonic	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i16_monotonic	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i32_monotonic	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
atomic-signext.ll	atomicrmw_xor_i32_monotonic_crossbb	`-mtriple=riscv64 -mattr=+zalrsc -verify-machineinstrs`
forced-atomics.ll	rmw32_xor_seq_cst	`-mtriple=riscv32 -mattr=+forced-atomics`
forced-atomics.ll	rmw32_xor_seq_cst	`-mtriple=riscv32 -mattr=+forced-atomics,+no-trailing-seq-cst-fence`
forced-atomics.ll	rmw32_xor_seq_cst	`-mtriple=riscv64 -mattr=+forced-atomics`
forced-atomics.ll	rmw32_xor_seq_cst	`-mtriple=riscv64 -mattr=+forced-atomics,+no-trailing-seq-cst-fence`

Generated 2026-10-15 08:05 UTC.