fallback: legalize: G_CLMUL s32

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_CLMUL s32
Occurrences:45 in 12 configs, 5 test files
Snippet from:combine-clmul.ll @combine_i32_cmul_constant via llvm-extract
Config:-mtriple=riscv64 -mattr=+zbc
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i32 @combine_i32_cmul_constant() #0 {
  %res = call i32 @llvm.clmul.i32(i32 6, i32 10)
  ret i32 %res
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.clmul.i32(i32, i32) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv64 -mattr=+zbc -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+zbc -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s32) = G_CLMUL %0:_, %1:_ (in function: combine_i32_cmul_constant)
warning: Instruction selection used fallback path for combine_i32_cmul_constant

Occurrences (45):

InputFunctionConfig
clmul.llclmul_i32-mtriple=riscv32 -mattr=+m -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv32 -mattr=+m,+zbs -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv32 -mattr=+m,+zvbc -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv32 -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv64 -mattr=+m -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv64 -mattr=+m,+zbc -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv64 -mattr=+m,+zbs -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv64 -mattr=+m,+zvbc -verify-machineinstrs
clmul.llclmul_i32-mtriple=riscv64 -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv32 -mattr=+m -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv32 -mattr=+m,+zbs -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv32 -mattr=+m,+zvbc -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv32 -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv64 -mattr=+m -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv64 -mattr=+m,+zbc -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv64 -mattr=+m,+zbs -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv64 -mattr=+m,+zvbc -verify-machineinstrs
clmulh.llclmulh_i16-mtriple=riscv64 -verify-machineinstrs
clmulr.llclmulr_i16-mtriple=riscv32 -mattr=+m -verify-machineinstrs
clmulr.llclmulr_i16-mtriple=riscv32 -mattr=+m,+zbs -verify-machineinstrs
clmulr.llclmulr_i16-mtriple=riscv32 -verify-machineinstrs
clmulr.llclmulr_i16-mtriple=riscv64 -mattr=+m -verify-machineinstrs
clmulr.llclmulr_i16-mtriple=riscv64 -mattr=+m,+zbc -verify-machineinstrs
clmulr.llclmulr_i16-mtriple=riscv64 -mattr=+m,+zbs -verify-machineinstrs
clmulr.llclmulr_i16-mtriple=riscv64 -verify-machineinstrs
combine-clmul.llcombine_i32_cmul_constant-mtriple=riscv64 -mattr=+zbc
combine-clmul.llcombine_i32_cmul_zero-mtriple=riscv64 -mattr=+zbc
rv64zbc-zbkc-intrinsic.llclmul32-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.llllvm_clmul_i32-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.llclmul32-mtriple=riscv64 -mattr=+zbkc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.llllvm_clmul_i32-mtriple=riscv64 -mattr=+zbkc -verify-machineinstrs
combine-clmul.587c33a188.ll (mutant of combine-clmul.ll)combine_i32_cmul_zero-mtriple=riscv64 -mattr=+zbc
combine-clmul.7608a67b03.ll (mutant of combine-clmul.ll)combine_i32_cmul_constant-mtriple=riscv64 -mattr=+zbc
combine-clmul.a53b4b5ae8.ll (mutant of combine-clmul.ll)combine_i32_cmul_zero-mtriple=riscv64 -mattr=+zbc
combine-clmul.f7a253697f.ll (mutant of combine-clmul.ll)combine_i32_cmul_constant-mtriple=riscv64 -mattr=+zbc
rv64zbc-zbkc-intrinsic.6d5829497a.ll (mutant of rv64zbc-zbkc-intrinsic.ll)clmul32-mtriple=riscv64 -mattr=+zbkc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.6d5829497a.ll (mutant of rv64zbc-zbkc-intrinsic.ll)llvm_clmul_i32-mtriple=riscv64 -mattr=+zbkc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.7fcbf672a0.ll (mutant of rv64zbc-zbkc-intrinsic.ll)clmul32-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.8429cfe338.ll (mutant of rv64zbc-zbkc-intrinsic.ll)clmul32-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.86b114cfb4.ll (mutant of rv64zbc-zbkc-intrinsic.ll)clmul32-mtriple=riscv64 -mattr=+zbkc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.9fc8ff9275.ll (mutant of rv64zbc-zbkc-intrinsic.ll)llvm_clmul_i32-mtriple=riscv64 -mattr=+zbkc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.c999675dcc.ll (mutant of rv64zbc-zbkc-intrinsic.ll)llvm_clmul_i32-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.cbcbb5adab.ll (mutant of rv64zbc-zbkc-intrinsic.ll)clmul32-mtriple=riscv64 -mattr=+zbkc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.f51a02697a.ll (mutant of rv64zbc-zbkc-intrinsic.ll)clmul32-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs
rv64zbc-zbkc-intrinsic.f51a02697a.ll (mutant of rv64zbc-zbkc-intrinsic.ll)llvm_clmul_i32-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.