fallback: legalize: G_EXTRACT_VECTOR

fallback: legalize: G_EXTRACT_VECTOR_ELT s32,<4 x s32>

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_EXTRACT_VECTOR_ELT s32,<4 x s32>
Occurrences:	61 in 33 configs, 25 test files
Snippet from:	reduction-formation.ll @reduce_sum_4xi32 via llvm-extract
Config:	`-mtriple=riscv32 -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define i32 @reduce_sum_4xi32(<4 x i32> %v) {
  %e0 = extractelement <4 x i32> %v, i32 0
  %e1 = extractelement <4 x i32> %v, i32 1
  %e2 = extractelement <4 x i32> %v, i32 2
  %e3 = extractelement <4 x i32> %v, i32 3
  %add0 = add i32 %e0, %e1
  %add1 = add i32 %add0, %e2
  %add2 = add i32 %add1, %e3
  ret i32 %add2
}

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %8:_(s32) = G_EXTRACT_VECTOR_ELT %0:_(<4 x s32>), %9:_(s32) (in function: reduce_sum_4xi32)
warning: Instruction selection used fallback path for reduce_sum_4xi32

Occurrences (61) (first 50):

Input	Function	Config
double_reduct.ll	fmul_f32	`-mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs`
double_reduct.ll	mul_i32	`-mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d -verify-machineinstrs`
reduction-formation.ll	reduce_sum_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
reduction-formation.ll	reduce_xor_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
reduction-formation.ll	reduce_or_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
add-before-shl.421409bd63.ll (mutant of add-before-shl.ll)	add_large_const	`-mtriple=riscv32 -verify-machineinstrs -M no-aliases`
add-before-shl.65405a1298.ll (mutant of add-before-shl.ll)	add_large_const	`-mtriple=riscv32 -mattr=+zca -verify-machineinstrs -M no-aliases`
add-before-shl.6c3444a450.ll (mutant of add-before-shl.ll)	add_large_const	`-mtriple=riscv32 -mattr=+c -verify-machineinstrs -M no-aliases`
and-shl.0701d179cd.ll (mutant of and-shl.ll)	and_0x7ff_shl_2	`-mtriple=riscv32 -verify-machineinstrs`
andn-zext-lowmask.290307748f.ll (mutant of andn-zext-lowmask.ll)	andn_zext_lowmask_i64_i16	`-mtriple=riscv32 -verify-machineinstrs`
andn-zext-lowmask.9cc5679dda.ll (mutant of andn-zext-lowmask.ll)	andn_zext_lowmask_i64_i16	`-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs`
callee-saved-gprs.016aeb6c4f.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+zilsd -target-abi ilp32e -verify-machineinstrs`
callee-saved-gprs.14eeffbf50.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+d -target-abi ilp32f -verify-machineinstrs`
callee-saved-gprs.61df128a1d.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+zilsd -verify-machineinstrs -frame-pointer=all`
callee-saved-gprs.6b20fb924c.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs`
callee-saved-gprs.74d0110082.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -verify-machineinstrs -frame-pointer=all`
callee-saved-gprs.766bfbf8f6.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+zilsd,+zilsd-word-align -target-abi ilp32e -verify-machineinstrs`
callee-saved-gprs.99636b2c74.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+f -target-abi ilp32f -verify-machineinstrs`
callee-saved-gprs.9d3f42aa10.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+d -target-abi ilp32d -verify-machineinstrs`
callee-saved-gprs.bc0cfbadc4.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+zcmp -verify-machineinstrs -frame-pointer=all`
callee-saved-gprs.d78795de33.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+zilsd -verify-machineinstrs`
callee-saved-gprs.dcfc0ed732.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -verify-machineinstrs`
callee-saved-gprs.e66d4193ca.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv32 -mattr=+zcmp -verify-machineinstrs`
calling-conv-preserve-most.5bfd53d462.ll (mutant of calling-conv-preserve-most.ll)	preserve_mostcc3	`-mtriple=riscv32`
calling-conv-preserve-most.ecc34cc09a.ll (mutant of calling-conv-preserve-most.ll)	preserve_mostcc3	`-mtriple=riscv32 -mattr=+e -target-abi ilp32e`
fpenv.0d74d8e359.ll (mutant of fpenv.ll)	test_get_rounding_sideeffect	`-mtriple=riscv32 -mattr=+f -verify-machineinstrs`
get-register-noreserve.8afd398fc4.ll (mutant of get-register-noreserve.ll)	get_tp_arch_name	`-mtriple=riscv32`
inline-asm-zdinx-constraint-r.07373301c9.ll (mutant of inline-asm-zdinx-constraint-r.ll)	constraint_cr_double	`-mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs`
inline-asm-zhinx-constraint-r.1c924de8e4.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cr_half	`-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=ilp32`
inline-asm-zhinx-constraint-r.217e17c8a5.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cr_half	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi=ilp32`
local-stack-slot-allocation.e3d8f0bae4.ll (mutant of local-stack-slot-allocation.ll)	load_with_offset	`-mtriple=riscv32 -verify-machineinstrs`
memset.50869fa23f.ll (mutant of memset.ll)	memset_i32_2147483648	`-mtriple=riscv32`
patchable-function-entry.5e400acc20.ll (mutant of patchable-function-entry.ll)	f5	`-mtriple=riscv32 -M no-aliases`
patchable-function-entry.dcf6c37abf.ll (mutant of patchable-function-entry.ll)	f5	`-mtriple=riscv32 -mattr=+c -M no-aliases`
reduction-formation.408840cf3e.ll (mutant of reduction-formation.ll)	reduce_xor_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
reduction-formation.408840cf3e.ll (mutant of reduction-formation.ll)	reduce_or_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
reduction-formation.4574a91c0a.ll (mutant of reduction-formation.ll)	reduce_xor_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
reduction-formation.4db743a50c.ll (mutant of reduction-formation.ll)	reduce_xor_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
reduction-formation.fe78a98ef1.ll (mutant of reduction-formation.ll)	reduce_sum_4xi32	`-mtriple=riscv32 -verify-machineinstrs`
sadd_sat.55b835858f.ll (mutant of sadd_sat.ll)	func2	`-mtriple=riscv32 -mattr=+m,+zbb`
sadd_sat.a18ecc7068.ll (mutant of sadd_sat.ll)	func2	`-mtriple=riscv32 -mattr=+m`
sadd_sat_plus.9d1e8ba29d.ll (mutant of sadd_sat_plus.ll)	func64	`-mtriple=riscv32 -mattr=+m`
sadd_sat_plus.feb5de7917.ll (mutant of sadd_sat_plus.ll)	func64	`-mtriple=riscv32 -mattr=+m,+zbb`
ssub_sat.23c5446a9d.ll (mutant of ssub_sat.ll)	func2	`-mtriple=riscv32 -mattr=+m,+zbb`
ssub_sat.5ecd2230a3.ll (mutant of ssub_sat.ll)	func2	`-mtriple=riscv32 -mattr=+m`
ssub_sat_plus.07434eef8f.ll (mutant of ssub_sat_plus.ll)	func64	`-mtriple=riscv32 -mattr=+m`
ssub_sat_plus.7e61eef4f2.ll (mutant of ssub_sat_plus.ll)	func64	`-mtriple=riscv32 -mattr=+m,+zbb`
tail-calls-sret.f0b2bce3ad.ll (mutant of tail-calls-sret.ll)	caller_sret_unused	`-mtriple=riscv32 -verify-machineinstrs`
tls-models.004070396a.ll (mutant of tls-models.ll)	f3	`-mtriple=riscv32 -relocation-model=pic -enable-tlsdesc`
tls-models.26d13d4332.ll (mutant of tls-models.ll)	f3	`-mtriple=riscv32 -relocation-model=pic`

Generated 2026-10-15 08:05 UTC.