fallback: legalize: G_EXTRACT_VECTOR

fallback: legalize: G_EXTRACT_VECTOR_ELT s32,<4 x s32>,s64

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_EXTRACT_VECTOR_ELT s32,<4 x s32>,s64
Occurrences:	73 in 33 configs, 30 test files
Snippet from:	reduction-formation.ll @reduce_sum_4xi32 via llvm-extract
Config:	`-mtriple=riscv64 -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

define i32 @reduce_sum_4xi32(<4 x i32> %v) {
  %e0 = extractelement <4 x i32> %v, i32 0
  %e1 = extractelement <4 x i32> %v, i32 1
  %e2 = extractelement <4 x i32> %v, i32 2
  %e3 = extractelement <4 x i32> %v, i32 3
  %add0 = add i32 %e0, %e1
  %add1 = add i32 %add0, %e2
  %add2 = add i32 %add1, %e3
  ret i32 %add2
}

Reproduce:

llc -mtriple=riscv64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %8:_(s32) = G_EXTRACT_VECTOR_ELT %0:_(<4 x s32>), %9:_(s64) (in function: reduce_sum_4xi32)
warning: Instruction selection used fallback path for reduce_sum_4xi32

Occurrences (73) (first 50):

Input	Function	Config
combine-is_fpclass.ll	extract_bitcast_sign_set_not_pos	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.ll	extract_bitcast_unknown_sign_ispos	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.ll	extract_bitcast_not_nan	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.ll	extract_bitcast_maybe_nan	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.ll	extract_bitcast_unknown_idx_not_pos	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.ll	extract_fabs_unknown_idx_isneg	`-mtriple=riscv64 -mattr=+v,+f,+d`
double_reduct.ll	fmul_f32	`-mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d -verify-machineinstrs`
double_reduct.ll	mul_i32	`-mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d -verify-machineinstrs`
reduction-formation.ll	reduce_sum_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
reduction-formation.ll	reduce_xor_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
reduction-formation.ll	reduce_or_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
add-before-shl.0f1bdc4335.ll (mutant of add-before-shl.ll)	add_large_const	`-mtriple=riscv64 -verify-machineinstrs -M no-aliases`
add-before-shl.401037f0af.ll (mutant of add-before-shl.ll)	add_large_const	`-mtriple=riscv64 -mattr=+zca -verify-machineinstrs -M no-aliases`
add-before-shl.f034fef4e5.ll (mutant of add-before-shl.ll)	add_large_const	`-mtriple=riscv64 -mattr=+c -verify-machineinstrs -M no-aliases`
and-shl.6abdc89c7c.ll (mutant of and-shl.ll)	and_0x7ff_shl_2	`-mtriple=riscv64 -verify-machineinstrs`
andn-zext-lowmask.01a228938e.ll (mutant of andn-zext-lowmask.ll)	andn_zext_lowmask_i64_i16	`-mtriple=riscv64 -verify-machineinstrs`
andn-zext-lowmask.0edbc1dc0f.ll (mutant of andn-zext-lowmask.ll)	andn_zext_lowmask_i64_i16	`-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs`
callee-saved-gprs.0626111f5c.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -mattr=+d -target-abi lp64f -verify-machineinstrs`
callee-saved-gprs.0d8bbde3c1.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -mattr=+zcmp -verify-machineinstrs -frame-pointer=all`
callee-saved-gprs.2443bf8994.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -target-abi lp64e -verify-machineinstrs`
callee-saved-gprs.44a97ba72e.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -verify-machineinstrs`
callee-saved-gprs.5cc3de6e81.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -mattr=+d -target-abi lp64d -verify-machineinstrs`
callee-saved-gprs.93977dba97.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -verify-machineinstrs -frame-pointer=all`
callee-saved-gprs.953a5d1c56.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs`
callee-saved-gprs.ab559a6047.ll (mutant of callee-saved-gprs.ll)	caller	`-mtriple=riscv64 -mattr=+zcmp -verify-machineinstrs`
calling-conv-lp64-lp64f-common.875c469513.ll (mutant of calling-conv-lp64-lp64f-common.ll)	callee_double_ret	`-mtriple=riscv64 -verify-machineinstrs`
calling-conv-lp64-lp64f-common.e364d53c01.ll (mutant of calling-conv-lp64-lp64f-common.ll)	callee_double_ret	`-mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs`
calling-conv-preserve-most.2504aa2b84.ll (mutant of calling-conv-preserve-most.ll)	preserve_mostcc3	`-mtriple=riscv64 -mattr=+e -target-abi lp64e`
calling-conv-preserve-most.6366a33752.ll (mutant of calling-conv-preserve-most.ll)	preserve_mostcc3	`-mtriple=riscv64`
combine-is_fpclass.147de0a193.ll (mutant of combine-is_fpclass.ll)	extract_bitcast_unknown_idx_not_pos	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.147de0a193.ll (mutant of combine-is_fpclass.ll)	extract_fabs_unknown_idx_isneg	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.b9be8355e3.ll (mutant of combine-is_fpclass.ll)	extract_bitcast_sign_set_not_pos	`-mtriple=riscv64 -mattr=+v,+f,+d`
combine-is_fpclass.b9be8355e3.ll (mutant of combine-is_fpclass.ll)	extract_bitcast_maybe_nan	`-mtriple=riscv64 -mattr=+v,+f,+d`
fpenv.958009228f.ll (mutant of fpenv.ll)	test_get_rounding_sideeffect	`-mtriple=riscv64 -mattr=+f -verify-machineinstrs`
inline-asm-zdinx-constraint-r.f077c1826c.ll (mutant of inline-asm-zdinx-constraint-r.ll)	constraint_cr_double	`-mtriple=riscv64 -mattr=+zdinx -target-abi=lp64 -verify-machineinstrs`
inline-asm-zhinx-constraint-r.35808cba3c.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cr_half	`-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=lp64`
inline-asm-zhinx-constraint-r.c524e3510b.ll (mutant of inline-asm-zhinx-constraint-r.ll)	constraint_cr_half	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi=lp64`
local-stack-slot-allocation.5253708781.ll (mutant of local-stack-slot-allocation.ll)	load_with_offset	`-mtriple=riscv64 -verify-machineinstrs`
memset.6b23185a97.ll (mutant of memset.ll)	memset_i32_2147483648	`-mtriple=riscv64`
patchable-function-entry.6e12837e1b.ll (mutant of patchable-function-entry.ll)	f5	`-mtriple=riscv64 -M no-aliases`
patchable-function-entry.d4481aa469.ll (mutant of patchable-function-entry.ll)	f5	`-mtriple=riscv64 -mattr=+c -M no-aliases`
pr69586.3d010ef272.ll (mutant of pr69586.ll)	test	`-mtriple=riscv64 -mattr=+m,+v,+xsfvcp --riscv-use-rematerializable-movimm=true`
pr69586.b53568bd79.ll (mutant of pr69586.ll)	test	`-mtriple=riscv64 -mattr=+m,+v,+xsfvcp -riscv-use-rematerializable-movimm=false`
reduction-formation.4307b533eb.ll (mutant of reduction-formation.ll)	reduce_sum_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
reduction-formation.84ef21d525.ll (mutant of reduction-formation.ll)	reduce_xor_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
reduction-formation.84ef21d525.ll (mutant of reduction-formation.ll)	reduce_or_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
reduction-formation.934d6d255f.ll (mutant of reduction-formation.ll)	reduce_xor_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
reduction-formation.da65fd381e.ll (mutant of reduction-formation.ll)	reduce_xor_4xi32	`-mtriple=riscv64 -verify-machineinstrs`
rv64zbb-intrinsic.550d706917.ll (mutant of rv64zbb-intrinsic.ll)	orcb32_zext	`-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs`
rv64zbc-intrinsic.0e5ec118ac.ll (mutant of rv64zbc-intrinsic.ll)	clmul32r	`-mtriple=riscv64 -mattr=+zbc -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.