fallback: legalize: G

fallback: legalize: G_FCONSTANT s16

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_FCONSTANT s16
Occurrences:	299 in 101 configs, 29 test files
Snippet from:	bfloat-imm.ll @bfloat_imm via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define bfloat @bfloat_imm() #0 {
  ret bfloat 3.000000e+00
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %0:_(s16) = G_FCONSTANT bfloat 3.000000e+00 (in function: bfloat_imm)
warning: Instruction selection used fallback path for bfloat_imm

Occurrences (299) (first 50):

Input	Function	Config
bfloat-imm.ll	bfloat_imm	`-mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f`
bfloat-imm.ll	bfloat_zero	`-mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f`
bfloat-imm.ll	bfloat_negative_zero	`-mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f`
bfloat-imm.ll	bfloat_imm	`-mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs -target-abi lp64f`
bfloat-imm.ll	bfloat_zero	`-mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs -target-abi lp64f`
bfloat-imm.ll	bfloat_negative_zero	`-mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs -target-abi lp64f`
bfloat-select-icmp.ll	select_icmp_slt_one	`-mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f`
bfloat-select-icmp.ll	select_icmp_sgt_zero	`-mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs -target-abi ilp32f`
bfloat-select-icmp.ll	select_icmp_slt_one	`-mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs -target-abi lp64f`
bfloat-select-icmp.ll	select_icmp_sgt_zero	`-mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs -target-abi lp64f`
calling-conv-half.ll	caller_half_in_regs	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack_exhausted_gprs_fprs	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs`
calling-conv-half.ll	callee_half_ret	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs`
calling-conv-half.ll	caller_half_in_regs	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32f -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32f -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack_exhausted_gprs_fprs	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32f -verify-machineinstrs`
calling-conv-half.ll	callee_half_ret	`-mtriple=riscv32 -mattr=+f -target-abi=ilp32f -verify-machineinstrs`
calling-conv-half.ll	caller_half_in_regs	`-mtriple=riscv32 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack	`-mtriple=riscv32 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack_exhausted_gprs_fprs	`-mtriple=riscv32 -verify-machineinstrs`
calling-conv-half.ll	callee_half_ret	`-mtriple=riscv32 -verify-machineinstrs`
calling-conv-half.ll	caller_half_in_regs	`-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack	`-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack_exhausted_gprs_fprs	`-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs`
calling-conv-half.ll	callee_half_ret	`-mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs`
calling-conv-half.ll	caller_half_in_regs	`-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack	`-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack_exhausted_gprs_fprs	`-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs`
calling-conv-half.ll	callee_half_ret	`-mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs`
calling-conv-half.ll	caller_half_in_regs	`-mtriple=riscv64 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack	`-mtriple=riscv64 -verify-machineinstrs`
calling-conv-half.ll	caller_half_on_stack_exhausted_gprs_fprs	`-mtriple=riscv64 -verify-machineinstrs`
calling-conv-half.ll	callee_half_ret	`-mtriple=riscv64 -verify-machineinstrs`
half-imm.ll	half_imm	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_positive_zero	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_negative_zero	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_imm	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_positive_zero	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_negative_zero	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-imm.ll	half_imm	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-imm.ll	half_positive_zero	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-imm.ll	half_negative_zero	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-imm.ll	half_imm	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-imm.ll	half_positive_zero	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-imm.ll	half_negative_zero	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-isnan.ll	half_is_nan	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-isnan.ll	half_not_nan	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-isnan.ll	half_is_nan	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-isnan.ll	half_not_nan	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`

Generated 2026-10-15 08:05 UTC.