fallback: legalize: G

fallback: legalize: G_FMINIMUM s16

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_FMINIMUM s16
Occurrences:	56 in 8 configs, 2 test files
Snippet from:	half-zfa.ll @fminm_h via llvm-extract
Config:	`-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fminm_h(half %a, half %b) #0 {
  %1 = call half @llvm.minimum.f16(half %a, half %b)
  ret half %1
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare half @llvm.minimum.f16(half, half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FMINIMUM %0:_, %1:_ (in function: fminm_h)
warning: Instruction selection used fallback path for fminm_h

Occurrences (56) (first 50):

Input	Function	Config
half-maximum-minimum.ll	fminimum_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_nnan_attr_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_nnan_attr_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.ll	fminimum_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.ll	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.ll	fminimum_nnan_attr_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.ll	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.ll	fminimum_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_nnan_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_nnan_attr_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_nnan_op_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_nnan_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_nnan_attr_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_nnan_op_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.ll	fminimum_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-maximum-minimum.ll	fminimum_nnan_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-maximum-minimum.ll	fminimum_nnan_attr_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-maximum-minimum.ll	fminimum_nnan_op_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-zfa.ll	fminm_h	`-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin`
half-zfa.ll	fminm_h	`-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin`
half-maximum-minimum.1ef0ba3f2d.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.1ef0ba3f2d.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.461a3753a6.ll (mutant of half-maximum-minimum.ll)	fminimum_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.461a3753a6.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.461a3753a6.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.65f6973c3e.ll (mutant of half-maximum-minimum.ll)	fminimum_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.65f6973c3e.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.65f6973c3e.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.6a06e03568.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.6a06e03568.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-maximum-minimum.703afb090f.ll (mutant of half-maximum-minimum.ll)	fminimum_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.703afb090f.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.703afb090f.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.75425283c1.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.75425283c1.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.8dd1f4ff4a.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.8dd1f4ff4a.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-maximum-minimum.8e9fd6ae3a.ll (mutant of half-maximum-minimum.ll)	fminimum_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-maximum-minimum.8e9fd6ae3a.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-maximum-minimum.8e9fd6ae3a.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-maximum-minimum.900d32d25f.ll (mutant of half-maximum-minimum.ll)	fminimum_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.900d32d25f.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.900d32d25f.ll (mutant of half-maximum-minimum.ll)	fminimum_nnan_op_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-maximum-minimum.caccb241b6.ll (mutant of half-maximum-minimum.ll)	fminimum_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`

Generated 2026-10-15 08:05 UTC.