fallback: legalize: G

fallback: legalize: G_FMUL s16

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_FMUL s16
Occurrences:	62 in 30 configs, 10 test files
Snippet from:	half-arith.ll @fmul_h via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fmul_h(half %a, half %b) #0 {
  %1 = fmul half %a, %b
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FMUL %0:_, %1:_ (in function: fmul_h)
warning: Instruction selection used fallback path for fmul_h

Occurrences (62) (first 50):

Input	Function	Config
fp16-promote.ll	test_fmul	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
half-arith.ll	fmul_h	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.ll	fmul_h	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.ll	fmul_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.ll	fmul_h	`-mtriple=riscv64 -verify-machineinstrs`
half-arith.ll	fsgnjx_f16	`-mtriple=riscv64 -verify-machineinstrs`
alu32.353aba7094.ll (mutant of alu32.ll)	sll_negative_constant_lhs	`-mtriple=riscv64 -verify-machineinstrs`
alu32.fcf9942227.ll (mutant of alu32.ll)	sll_negative_constant_lhs	`-mtriple=riscv32 -verify-machineinstrs`
compress-opt-select.38b8c416c2.ll (mutant of compress-opt-select.ll)	eq_small_edge_pos	`-mtriple=riscv32 -target-abi ilp32d -mattr=+zca,+f,+d -M no-aliases`
compress-opt-select.46b42d156a.ll (mutant of compress-opt-select.ll)	eq_small_edge_pos	`-mtriple=riscv32 -target-abi ilp32d -mattr=+c,+f,+d -M no-aliases`
compress-opt-select.ffecb70b38.ll (mutant of compress-opt-select.ll)	eq_small_edge_pos	`-mtriple=riscv32 -target-abi ilp32d -mattr=-c,+f,+d -M no-aliases`
ctlz-cttz-ctpop.1c3416023d.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv64 -verify-machineinstrs`
ctlz-cttz-ctpop.3713038af0.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv32 -verify-machineinstrs`
ctlz-cttz-ctpop.4d28360af2.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv32 -mattr=+m -verify-machineinstrs`
ctlz-cttz-ctpop.5ebb649d31.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv64 -mattr=+xtheadbb -verify-machineinstrs`
ctlz-cttz-ctpop.853aaec6f5.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv64 -mattr=+m -verify-machineinstrs`
ctlz-cttz-ctpop.972011bbb9.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs`
ctlz-cttz-ctpop.d971c6b529.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs`
ctlz-cttz-ctpop.f2512b93ed.ll (mutant of ctlz-cttz-ctpop.ll)	test_ctlz_i32_zero_poison	`-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs`
div-by-constant.14f7fe0b9d.ll (mutant of div-by-constant.ll)	sdiv64_constant_add_srai	`-mtriple=riscv64 -mattr=+m,+zba,+zbb -verify-machineinstrs`
div-by-constant.3b0ad880f8.ll (mutant of div-by-constant.ll)	sdiv64_constant_add_srai	`-mtriple=riscv32 -mattr=+m -verify-machineinstrs`
div-by-constant.a903155b9c.ll (mutant of div-by-constant.ll)	sdiv64_constant_add_srai	`-mtriple=riscv32 -mattr=+m,+zba,+zbb -verify-machineinstrs`
div-by-constant.c707c1b87f.ll (mutant of div-by-constant.ll)	sdiv64_constant_add_srai	`-mtriple=riscv64 -mattr=+m -verify-machineinstrs`
fp16-promote.4389b6b002.ll (mutant of fp16-promote.ll)	test_fmul	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
fp16-promote.b0b587f7ab.ll (mutant of fp16-promote.ll)	test_fmul	`-mtriple=riscv32 -mattr +d -target-abi ilp32d`
half-arith.0fd0a7eef5.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv64 -verify-machineinstrs`
half-arith.0fd0a7eef5.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv64 -verify-machineinstrs`
half-arith.27875fde11.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.27875fde11.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-arith.38c1dd440e.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.38c1dd440e.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-arith.414346b595.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-arith.414346b595.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32`
half-arith.830ee7d588.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.830ee7d588.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-arith.c105012049.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-arith.c105012049.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32`
half-arith.c3df70f0c8.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-arith.c3df70f0c8.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64`
half-arith.e0da85854a.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-arith.e0da85854a.ll (mutant of half-arith.ll)	fsgnjx_f16	`-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64`
half-arith.eafe012a3d.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv64 -verify-machineinstrs`
half-arith.fe1a1fc7d7.ll (mutant of half-arith.ll)	fmul_h	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-bitmanip-dagcombines.4d7e73fd85.ll (mutant of half-bitmanip-dagcombines.ll)	fcopysign_fneg	`-mtriple=riscv64 -verify-machineinstrs`
half-bitmanip-dagcombines.7e340d3394.ll (mutant of half-bitmanip-dagcombines.ll)	fcopysign_fneg	`-mtriple=riscv64 -target-abi lp64 -mattr=+zhinxmin -verify-machineinstrs`
half-bitmanip-dagcombines.8ba6a4bbae.ll (mutant of half-bitmanip-dagcombines.ll)	fcopysign_fneg	`-mtriple=riscv64 -target-abi lp64 -verify-machineinstrs`
half-bitmanip-dagcombines.8c4eec0c5d.ll (mutant of half-bitmanip-dagcombines.ll)	fcopysign_fneg	`-mtriple=riscv32 -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.