fallback: legalize: G_FNEG s16

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_FNEG s16
Occurrences:68 in 15 configs, 2 test files
Snippet from:half-bitmanip-dagcombines.ll @fneg via llvm-extract
Config:-mtriple=riscv32 -target-abi ilp32 -mattr=+zfhmin -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fneg(half %a) #0 {
  %1 = fneg half %a
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -target-abi ilp32 -mattr=+zfhmin -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -target-abi ilp32 -mattr=+zfhmin -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FNEG %0:_ (in function: fneg)
warning: Instruction selection used fallback path for fneg

Occurrences (68) (first 50):

InputFunctionConfig
half-arith.llfneg_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfsgnjn_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmadd_h_3-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmadd_nsz-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfneg_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfsgnjn_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmadd_h_3-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmadd_nsz-mtriple=riscv32 -verify-machineinstrs
half-arith.llfneg_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfsgnjn_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmadd_h_3-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmadd_nsz-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfneg_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfsgnjn_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmadd_h_3-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmadd_nsz-mtriple=riscv64 -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zfhmin -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zfhmin -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zhinx -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zhinx -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zhinxmin -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv32 -target-abi ilp32 -mattr=+zhinxmin -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv32 -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv32 -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv64 -target-abi lp64 -mattr=+zfhmin -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv64 -target-abi lp64 -mattr=+zfhmin -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv64 -target-abi lp64 -mattr=+zhinx -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv64 -target-abi lp64 -mattr=+zhinx -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv64 -target-abi lp64 -mattr=+zhinxmin -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv64 -target-abi lp64 -mattr=+zhinxmin -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv64 -target-abi lp64 -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv64 -target-abi lp64 -verify-machineinstrs
half-bitmanip-dagcombines.llfneg-mtriple=riscv64 -verify-machineinstrs
half-bitmanip-dagcombines.llfcopysign_fneg-mtriple=riscv64 -verify-machineinstrs
half-arith.3b7d18f183.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-arith.3cc951ff65.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -verify-machineinstrs
half-arith.4014fdfe0b.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.65d9ee1fca.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.68a9395765.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-arith.6c5a115d8d.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-arith.70cb02d490.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-arith.9796e4171b.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -verify-machineinstrs
half-arith.a015c43011.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-arith.ac74f686b7.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.bdb5eebd9c.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-arith.c83068528a.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -verify-machineinstrs
half-arith.d9b1fbf37d.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-arith.ec9ba70637.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -verify-machineinstrs
half-arith.eca740f2a7.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.f55ddb4622.ll (mutant of half-arith.ll)fneg_h-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64

Generated 2026-10-15 08:05 UTC.