| Run: | explore-bc8218b282-20261015-075519 |
| Kind: | fallback |
| Category: | legalize: G_FPTOSI_SAT s64 |
| Occurrences: | 36 in 6 configs, 2 test files |
| Snippet from: | double-convert.ll @fcvt_l_d_sat via llvm-extract |
| Config: | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| Local check: | reproduces at bc8218b282 |
| Compiler Explorer: | not uploaded (over --godbolt-limit or disabled) |
; Function Attrs: nounwind
define i64 @fcvt_l_d_sat(double %a) #0 {
start:
%0 = tail call i64 @llvm.fptosi.sat.i64.f64(double %a)
ret i64 %0
}
; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.fptosi.sat.i64.f64(double) #1
attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o - llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d -global-isel=0 snippet.ll -o -
remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_FPTOSI_SAT %0:_(s64) (in function: fcvt_l_d_sat) warning: Instruction selection used fallback path for fcvt_l_d_sat
| Input | Function | Config |
|---|---|---|
| double-convert.ll | fcvt_l_d_sat | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-convert.ll | fcvt_l_d_sat | -mtriple=riscv32 -verify-machineinstrs |
| double-convert.ll | fcvt_l_d_sat | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-convert.ll | fcvt_l_d_sat | -mtriple=riscv64 -verify-machineinstrs |
| double-round-conv-sat.ll | test_floor_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.ll | test_ceil_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.ll | test_trunc_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.ll | test_round_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.ll | test_roundeven_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.ll | test_rint_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.ll | test_floor_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.ll | test_ceil_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.ll | test_trunc_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.ll | test_round_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.ll | test_roundeven_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.ll | test_rint_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.ll | test_floor_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-round-conv-sat.ll | test_ceil_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-round-conv-sat.ll | test_trunc_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-round-conv-sat.ll | test_round_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-round-conv-sat.ll | test_roundeven_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-round-conv-sat.ll | test_rint_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-round-conv-sat.ll | test_floor_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.ll | test_ceil_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.ll | test_trunc_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.ll | test_round_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.ll | test_roundeven_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.ll | test_rint_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.0f34aae4f6.ll (mutant of double-round-conv-sat.ll) | test_floor_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.0f34aae4f6.ll (mutant of double-round-conv-sat.ll) | test_ceil_si64 | -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d |
| double-round-conv-sat.92246c4dd9.ll (mutant of double-round-conv-sat.ll) | test_floor_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.92246c4dd9.ll (mutant of double-round-conv-sat.ll) | test_ceil_si64 | -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 |
| double-round-conv-sat.b2d8d995f1.ll (mutant of double-round-conv-sat.ll) | test_floor_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.b2d8d995f1.ll (mutant of double-round-conv-sat.ll) | test_ceil_si64 | -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32 |
| double-round-conv-sat.d63e449461.ll (mutant of double-round-conv-sat.ll) | test_floor_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
| double-round-conv-sat.d63e449461.ll (mutant of double-round-conv-sat.ll) | test_ceil_si64 | -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d |
Generated 2026-10-15 08:05 UTC.