fallback: legalize: G_FPTOUI

fallback: legalize: G_FPTOUI_SAT s32,s64

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_FPTOUI_SAT s32,s64
Occurrences:	62 in 6 configs, 2 test files
Snippet from:	double-convert.ll @fcvt_wu_d_sat via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define i32 @fcvt_wu_d_sat(double %a) #0 {
start:
  %0 = tail call i32 @llvm.fptoui.sat.i32.f64(double %a)
  ret i32 %0
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.fptoui.sat.i32.f64(double) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s32) = G_FPTOUI_SAT %0:_(s64) (in function: fcvt_wu_d_sat)
warning: Instruction selection used fallback path for fcvt_wu_d_sat

Occurrences (62) (first 50):

Input	Function	Config
double-convert.ll	fcvt_wu_d_sat	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-convert.ll	fcvt_wu_d_sat_zext	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-convert.ll	fcvt_wu_d_sat	`-mtriple=riscv32 -verify-machineinstrs`
double-convert.ll	fcvt_wu_d_sat_zext	`-mtriple=riscv32 -verify-machineinstrs`
double-convert.ll	fcvt_wu_d_sat	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-convert.ll	fcvt_wu_d_sat_zext	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-convert.ll	fcvt_wu_d_sat	`-mtriple=riscv64 -verify-machineinstrs`
double-convert.ll	fcvt_wu_d_sat_zext	`-mtriple=riscv64 -verify-machineinstrs`
double-round-conv-sat.ll	test_floor_ui32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.ll	test_ceil_ui32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.ll	test_trunc_ui32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.ll	test_round_ui32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.ll	test_roundeven_ui32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.ll	test_rint_ui32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.ll	test_floor_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-round-conv-sat.ll	test_ceil_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-round-conv-sat.ll	test_trunc_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-round-conv-sat.ll	test_round_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-round-conv-sat.ll	test_roundeven_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-round-conv-sat.ll	test_rint_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-round-conv-sat.ll	test_floor_ui32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-round-conv-sat.ll	test_ceil_ui32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-round-conv-sat.ll	test_trunc_ui32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-round-conv-sat.ll	test_round_ui32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-round-conv-sat.ll	test_roundeven_ui32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-round-conv-sat.ll	test_rint_ui32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-round-conv-sat.ll	test_floor_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-round-conv-sat.ll	test_ceil_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-round-conv-sat.ll	test_trunc_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-round-conv-sat.ll	test_round_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-round-conv-sat.ll	test_roundeven_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-round-conv-sat.ll	test_rint_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-convert.01910862d7.ll (mutant of double-convert.ll)	fcvt_wu_d_sat	`-mtriple=riscv32 -verify-machineinstrs`
double-convert.19bb891ded.ll (mutant of double-convert.ll)	fcvt_wu_d_sat_zext	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-convert.1c1cfcbcf9.ll (mutant of double-convert.ll)	fcvt_wu_d_sat_zext	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-convert.240d0f5010.ll (mutant of double-convert.ll)	fcvt_wu_d_sat	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-convert.2772c931e2.ll (mutant of double-convert.ll)	fcvt_wu_d_sat_zext	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-convert.39c766202a.ll (mutant of double-convert.ll)	fcvt_wu_d_sat_zext	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-convert.40377396b8.ll (mutant of double-convert.ll)	fcvt_wu_d_sat	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-convert.6c3a47528a.ll (mutant of double-convert.ll)	fcvt_wu_d_sat	`-mtriple=riscv64 -verify-machineinstrs`
double-convert.6c93c4ab92.ll (mutant of double-convert.ll)	fcvt_wu_d_sat_zext	`-mtriple=riscv32 -verify-machineinstrs`
double-convert.6fb56cc10a.ll (mutant of double-convert.ll)	fcvt_wu_d_sat_zext	`-mtriple=riscv64 -verify-machineinstrs`
double-convert.988f11b0e3.ll (mutant of double-convert.ll)	fcvt_wu_d_sat	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-convert.df39eab617.ll (mutant of double-convert.ll)	fcvt_wu_d_sat	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.0b95dbe658.ll (mutant of double-round-conv-sat.ll)	test_floor_ui32	`-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d`
double-round-conv-sat.12cb2c2f82.ll (mutant of double-round-conv-sat.ll)	test_ceil_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-round-conv-sat.25ba3a6b18.ll (mutant of double-round-conv-sat.ll)	test_floor_ui32	`-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64`
double-round-conv-sat.3541dd5881.ll (mutant of double-round-conv-sat.ll)	test_floor_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`
double-round-conv-sat.5350200fd8.ll (mutant of double-round-conv-sat.ll)	test_floor_ui32	`-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d`
double-round-conv-sat.576fafa14b.ll (mutant of double-round-conv-sat.ll)	test_round_ui32	`-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32`

Generated 2026-10-15 08:05 UTC.