fallback: legalize: G_FPTRUNC s16,s128

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_FPTRUNC s16,s128
Occurrences:	14 in 14 configs, 1 test files
Snippet from:	half-convert.ll @fcvt_h_q via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define void @fcvt_h_q(fp128 %x, ptr %y) #0 {
  %a = fptrunc fp128 %x to half
  store half %a, ptr %y, align 2
  ret void
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %3:_(s16) = G_FPTRUNC %0:_(s128) (in function: fcvt_h_q)
warning: Instruction selection used fallback path for fcvt_h_q

Occurrences (14):

Input	Function	Config
half-convert.ll	fcvt_h_q	`-mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs`
half-convert.ll	fcvt_h_q	`-mtriple=riscv32 -mattr=+d -target-abi=ilp32d -verify-machineinstrs`
half-convert.ll	fcvt_h_q	`-mtriple=riscv32 -mattr=+d,+zfh -verify-machineinstrs -target-abi ilp32d`
half-convert.ll	fcvt_h_q	`-mtriple=riscv32 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-convert.ll	fcvt_h_q	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-convert.ll	fcvt_h_q	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-convert.ll	fcvt_h_q	`-mtriple=riscv32 -verify-machineinstrs`
half-convert.ll	fcvt_h_q	`-mtriple=riscv64 -mattr=+d -target-abi=lp64 -verify-machineinstrs`
half-convert.ll	fcvt_h_q	`-mtriple=riscv64 -mattr=+d -target-abi=lp64d -verify-machineinstrs`
half-convert.ll	fcvt_h_q	`-mtriple=riscv64 -mattr=+d,+zfh -verify-machineinstrs -target-abi lp64d`
half-convert.ll	fcvt_h_q	`-mtriple=riscv64 -mattr=+d,+zfhmin -verify-machineinstrs -target-abi lp64d`
half-convert.ll	fcvt_h_q	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-convert.ll	fcvt_h_q	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-convert.ll	fcvt_h_q	`-mtriple=riscv64 -verify-machineinstrs`

Generated 2026-10-15 08:05 UTC.