fallback: legalize: G

fallback: legalize: G_FRINT s16

Run:	explore-bc8218b282-20261015-075519
Kind:	fallback
Category:	legalize: G_FRINT s16
Occurrences:	14 in 12 configs, 2 test files
Snippet from:	half-intrinsics.ll @rint_f16 via llvm-extract
Config:	`-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d`
Local check:	reproduces at bc8218b282
Compiler Explorer:	not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @rint_f16(half %a) #0 {
  %1 = call half @llvm.rint.f16(half %a)
  ret half %1
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare half @llvm.rint.f16(half) #1

attributes #0 = { nounwind }
attributes #1 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(s16) = G_FRINT %0:_ (in function: rint_f16)
warning: Instruction selection used fallback path for rint_f16

Occurrences (14):

Input	Function	Config
half-intrinsics.ll	rint_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	rint_f16	`-mtriple=riscv32 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32d`
half-intrinsics.ll	rint_f16	`-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	rint_f16	`-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f`
half-intrinsics.ll	rint_f16	`-mtriple=riscv32 -verify-machineinstrs`
half-intrinsics.ll	rint_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfh -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	rint_f16	`-mtriple=riscv64 -mattr=+d -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d`
half-intrinsics.ll	rint_f16	`-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	rint_f16	`-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f`
half-intrinsics.ll	rint_f16	`-mtriple=riscv64 -verify-machineinstrs`
half-zfa.ll	froundnx_h	`-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin`
half-zfa.ll	froundnx_h	`-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin`
half-zfa.406bb4a479.ll (mutant of half-zfa.ll)	froundnx_h	`-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfhmin`
half-zfa.c97bb95096.ll (mutant of half-zfa.ll)	froundnx_h	`-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfhmin`

Generated 2026-10-15 08:05 UTC.