fallback: legalize: G_FSUB s16

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_FSUB s16
Occurrences:41 in 18 configs, 4 test files
Snippet from:half-arith.ll @fsub_h via llvm-extract
Config:-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

; Function Attrs: nounwind
define half @fsub_h(half %a, half %b) #0 {
  %1 = fsub half %a, %b
  ret half %1
}

attributes #0 = { nounwind }

Reproduce:

llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %2:_(s16) = G_FSUB %0:_, %1:_ (in function: fsub_h)
warning: Instruction selection used fallback path for fsub_h

Occurrences (41):

InputFunctionConfig
half-arith.llfsub_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfmsub_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmadd_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfnmsub_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.llfsub_h-mtriple=riscv32 -verify-machineinstrs
half-arith.llfmsub_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmadd_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.llfnmsub_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.llfsub_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfmsub_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmadd_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfnmsub_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.llfsub_h-mtriple=riscv64 -verify-machineinstrs
half-arith.llfmsub_h_contract-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmadd_h_contract-mtriple=riscv64 -verify-machineinstrs
half-arith.llfnmsub_h_contract-mtriple=riscv64 -verify-machineinstrs
copysign-casts.00115093cb.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv32 -verify-machineinstrs
copysign-casts.1ae640d9ee.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv64 -verify-machineinstrs
copysign-casts.2d3e42b86c.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv64 -verify-machineinstrs -mattr=+f -mattr=+d -mattr=+zfhmin -target-abi lp64d
copysign-casts.3700de1804.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv32 -verify-machineinstrs -mattr=+f -target-abi ilp32f
copysign-casts.405aee544c.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv32 -verify-machineinstrs -mattr=+f -mattr=+d -target-abi ilp32d
copysign-casts.64ff706fb2.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv32 -verify-machineinstrs -mattr=+f -mattr=+d -mattr=+zfhmin -target-abi ilp32d
copysign-casts.8eb3c9b6f1.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv32 -verify-machineinstrs -mattr=+f -mattr=+zfhmin -target-abi ilp32f
copysign-casts.fcbbd272e9.ll (mutant of copysign-casts.ll)fold_demote_h_s-mtriple=riscv64 -verify-machineinstrs -mattr=+f -mattr=+d -target-abi lp64d
half-arith.3b7d18f183.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64
half-arith.3dbe4fcdb7.ll (mutant of half-arith.ll)fsub_h-mtriple=riscv32 -verify-machineinstrs
half-arith.65d9ee1fca.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.68a9395765.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -mattr=+zhinxmin -verify-machineinstrs -target-abi ilp32
half-arith.9796e4171b.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -verify-machineinstrs
half-arith.b13ace9b2d.ll (mutant of half-arith.ll)fsub_h-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi ilp32f
half-arith.d9b1fbf37d.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi ilp32
half-arith.eafe012a3d.ll (mutant of half-arith.ll)fsub_h-mtriple=riscv64 -verify-machineinstrs
half-arith.ec9ba70637.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -verify-machineinstrs
half-arith.eca740f2a7.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
half-arith.f55ddb4622.ll (mutant of half-arith.ll)fmsub_h_contract-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi lp64
half-arith.fe1a1fc7d7.ll (mutant of half-arith.ll)fsub_h-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi lp64f
inline-asm-zhinx-constraint-r.1c924de8e4.ll (mutant of inline-asm-zhinx-constraint-r.ll)constraint_half_abi_name-mtriple=riscv32 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=ilp32
inline-asm-zhinx-constraint-r.217e17c8a5.ll (mutant of inline-asm-zhinx-constraint-r.ll)constraint_half_abi_name-mtriple=riscv32 -mattr=+zhinx -verify-machineinstrs -target-abi=ilp32
inline-asm-zhinx-constraint-r.35808cba3c.ll (mutant of inline-asm-zhinx-constraint-r.ll)constraint_half_abi_name-mtriple=riscv64 -mattr=+zdinx,+zhinx -verify-machineinstrs -target-abi=lp64
inline-asm-zhinx-constraint-r.c524e3510b.ll (mutant of inline-asm-zhinx-constraint-r.ll)constraint_half_abi_name-mtriple=riscv64 -mattr=+zhinx -verify-machineinstrs -target-abi=lp64
mem64.0ab51b51e8.ll (mutant of mem64.ll)lw_near_local-mtriple=riscv64 -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.