fallback: legalize: G_INSERT_SUBVECTOR <vscale x 1 x s32>,<2 x s32>

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_INSERT_SUBVECTOR <vscale x 1 x s32>,<2 x s32>
Occurrences:10 in 2 configs, 1 test files
Snippet from:and-add-lsr.ll @and_add_lsr_vec via llvm-extract
Config:-mtriple=riscv32 -verify-machineinstrs -mattr=+v
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <2 x i32> @and_add_lsr_vec(<2 x i32> %x, <2 x i32> %y) {
  %1 = add <2 x i32> %x, splat (i32 4095)
  %2 = lshr <2 x i32> %y, splat (i32 20)
  %r = and <2 x i32> %2, %1
  ret <2 x i32> %r
}

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -mattr=+v -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -mattr=+v -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %12:_(<vscale x 1 x s32>) = G_INSERT_SUBVECTOR %11:_, %10:_(<2 x s32>), 0 (in function: and_add_lsr_vec)
warning: Instruction selection used fallback path for and_add_lsr_vec

Occurrences (10):

InputFunctionConfig
and-add-lsr.lland_add_lsr_vec-mtriple=riscv32 -verify-machineinstrs -mattr=+v
and-add-lsr.lland_add_lsr_vec-mtriple=riscv64 -verify-machineinstrs -mattr=+v
and-add-lsr.18a20c3d8a.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv64 -verify-machineinstrs -mattr=+v
and-add-lsr.30f5687143.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv32 -verify-machineinstrs -mattr=+v
and-add-lsr.46e91c8df3.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv64 -verify-machineinstrs -mattr=+v
and-add-lsr.6ef10afb2e.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv64 -verify-machineinstrs -mattr=+v
and-add-lsr.cc59361864.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv32 -verify-machineinstrs -mattr=+v
and-add-lsr.d06488f5e1.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv64 -verify-machineinstrs -mattr=+v
and-add-lsr.e5e60af195.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv32 -verify-machineinstrs -mattr=+v
and-add-lsr.ec00672790.ll (mutant of and-add-lsr.ll)and_add_lsr_vec-mtriple=riscv32 -verify-machineinstrs -mattr=+v

Generated 2026-10-15 08:05 UTC.