fallback: legalize: G_INSERT_SUBVECTOR <vscale x 2 x s1>,<4 x s1>

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_INSERT_SUBVECTOR <vscale x 2 x s1>,<4 x s1>
Occurrences:13 in 2 configs, 2 test files
Snippet from:known-fpclass.ll @vselect_both_nevernan via llvm-extract
Config:-mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d
Local check:reproduces at bc8218b282
Compiler Explorer:not uploaded (over --godbolt-limit or disabled)

Snippet:

define <4 x i1> @vselect_both_nevernan(<4 x i1> %cond, <4 x float> nofpclass(nan) %a, <4 x float> nofpclass(nan) %b) {
  %sel = select <4 x i1> %cond, <4 x float> %a, <4 x float> %b
  %class = call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> %sel, /* (nan) */ i32 3)
  ret <4 x i1> %class
}

; Function Attrs: nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none)
declare <4 x i1> @llvm.is.fpclass.v4f32(<4 x float>, i32 immarg) #0

attributes #0 = { nocallback nocreateundeforpoison nofree nosync nounwind speculatable willreturn memory(none) }

Reproduce:

llc -mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %9:_(<vscale x 2 x s1>) = G_INSERT_SUBVECTOR %8:_, %7:_(<4 x s1>), 0 (in function: vselect_both_nevernan)
warning: Instruction selection used fallback path for vselect_both_nevernan

Occurrences (13):

InputFunctionConfig
combine-is_fpclass.llfneg_vec_not_negative-mtriple=riscv64 -mattr=+v,+f,+d
combine-is_fpclass.llfneg_vec_not_positive-mtriple=riscv64 -mattr=+v,+f,+d
combine-is_fpclass.llfneg_vec_unknown_sign-mtriple=riscv64 -mattr=+v,+f,+d
combine-is_fpclass.llinsert_subvec_fixed_both_isneg_false-mtriple=riscv64 -mattr=+v,+f,+d
combine-is_fpclass.llinsert_subvec_fixed_pos_base_neg_sub_isneg_unknown-mtriple=riscv64 -mattr=+v,+f,+d
combine-is_fpclass.llinsert_subvec_fixed_pos_base_pos_sub_isneg_false-mtriple=riscv64 -mattr=+v,+f,+d
known-fpclass.llvselect_both_nevernan-mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d
known-fpclass.llvselect_both_neverzero-mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d
combine-is_fpclass.1dc3fb9f27.ll (mutant of combine-is_fpclass.ll)fneg_vec_not_negative-mtriple=riscv64 -mattr=+v,+f,+d
combine-is_fpclass.1dc3fb9f27.ll (mutant of combine-is_fpclass.ll)insert_subvec_fixed_pos_base_neg_sub_isneg_unknown-mtriple=riscv64 -mattr=+v,+f,+d
combine-is_fpclass.cb336455ff.ll (mutant of combine-is_fpclass.ll)insert_subvec_fixed_pos_base_pos_sub_isneg_false-mtriple=riscv64 -mattr=+v,+f,+d
known-fpclass.1678209993.ll (mutant of known-fpclass.ll)vselect_both_nevernan-mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d
known-fpclass.dc070d2e87.ll (mutant of known-fpclass.ll)vselect_both_nevernan-mtriple=riscv64 -mattr=+v,+f,+d -target-abi=lp64d

Generated 2026-10-15 08:05 UTC.