fallback: legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64 NEW
Occurrences:35 in 22 configs, 19 test files
Snippet from:stack-realignment.99bc8de418.ll (mutant of stack-realignment.ll) @caller64 via llvm-extract + llvm-reduce
Config:-mtriple=riscv64 -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:https://godbolt.org/z/955MqW9TW (llc-assertions-trunk, checked 2026-10-15 08:05 UTC): G reproduces

Snippet:

define <2 x i64> @caller64(i64 %LGV1) {
  %I = insertelement <2 x i64> zeroinitializer, i64 0, i64 %LGV1
  ret <2 x i64> %I
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*012remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_INSERT_VECTOR_ELT %2:_, %3:_(s64), %0:_(s64) (in function: caller64)
warning: Instruction selection used fallback path for caller64
SelectionDAG (control)-mtriple=riscv64 -verify-machineinstrs -global-isel=0012-

Reproduce:

llc -mtriple=riscv64 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv64 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_INSERT_VECTOR_ELT %2:_, %3:_(s64), %0:_(s64) (in function: caller64)
warning: Instruction selection used fallback path for caller64

Occurrences (35):

InputFunctionConfig
atomic-load-zext.037b2bc023.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv64 -mattr=+a,+ztso,+no-trailing-seq-cst-fence -verify-machineinstrs
atomic-load-zext.057a786bc9.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv64 -verify-machineinstrs
atomic-load-zext.0b7ea8f1c6.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv64 -mattr=+a -verify-machineinstrs
atomic-load-zext.1e4a3e1509.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv64 -mattr=+a,+zalasr,+ztso -verify-machineinstrs
atomic-load-zext.958c7fd734.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv64 -mattr=+a,+no-trailing-seq-cst-fence -verify-machineinstrs
atomic-load-zext.e2eae29d47.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv64 -mattr=+a,+zalasr -verify-machineinstrs
atomic-load-zext.eab2031ebb.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv64 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw-discard.6d7d92cd49.ll (mutant of atomic-rmw-discard.ll)amoand_w_discard-O3 -mtriple=riscv64 -mattr=+a -verify-machineinstrs
div-pow2.91a999bd4e.ll (mutant of div-pow2.ll)sdiv32_pow2_4096-mtriple=riscv64 -verify-machineinstrs
double-select-fcmp.520b986f33.ll (mutant of double-select-fcmp.ll)select_fcmp_olt-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
double-select-fcmp.a3b5bab14a.ll (mutant of double-select-fcmp.ll)select_fcmp_olt-mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64
float-br-fcmp.ac30a6ada3.ll (mutant of float-br-fcmp.ll)br_fcmp_oge-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f
float-intrinsics.626ede893e.ll (mutant of float-intrinsics.ll)issnan_fpclass-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f
float-intrinsics.76013ee9dc.ll (mutant of float-intrinsics.ll)issnan_fpclass-mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d
float-intrinsics.c5a0ad1617.ll (mutant of float-intrinsics.ll)issnan_fpclass-mtriple=riscv64 -verify-machineinstrs
float-select-fcmp.8d4e89cb7d.ll (mutant of float-select-fcmp.ll)select_fcmp_olt-mtriple=riscv64 -mattr=+f -verify-machineinstrs -target-abi=lp64f
half-select-fcmp.05be951f96.ll (mutant of half-select-fcmp.ll)select_fcmp_olt-mtriple=riscv64 -mattr=+zfhmin -verify-machineinstrs -target-abi=lp64f
half-select-fcmp.b590588d72.ll (mutant of half-select-fcmp.ll)select_fcmp_olt-mtriple=riscv64 -mattr=+zfh -verify-machineinstrs -target-abi lp64f
half-zfa.7dcb366493.ll (mutant of half-zfa.ll)fround_h_3-mtriple=riscv64 -target-abi lp64f -mattr=+zfa,+zfh
machine-outliner-and-machine-copy-propagation.2c1a3e607a.ll (mutant of machine-outliner-and-machine-copy-propagation.ll)main-mtriple=riscv64 -riscv-enable-copy-propagation -enable-machine-outliner -verify-machineinstrs
orc-b-patterns.cceed8f3fb.ll (mutant of orc-b-patterns.ll)orc_b_i32_sub_shl8x_x_b2-mtriple=riscv64 -verify-machineinstrs
orc-b-patterns.e8878a2c70.ll (mutant of orc-b-patterns.ll)orc_b_i32_sub_shl8x_x_b2-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs
rem.20038f776d.ll (mutant of rem.ll)srem_pow2_2-mtriple=riscv64 -verify-machineinstrs
rem.25c7560ac0.ll (mutant of rem.ll)srem_pow2_2-mtriple=riscv64 -mattr=+m -verify-machineinstrs
shifts.342e865bc3.ll (mutant of shifts.ll)shl64-mtriple=riscv64 -verify-machineinstrs
shlimm-addimm.3805d00612.ll (mutant of shlimm-addimm.ll)shl5_add101024_b-mtriple=riscv64 -verify-machineinstrs
stack-realignment.99bc8de418.ll (mutant of stack-realignment.ll)caller64-mtriple=riscv64 -verify-machineinstrs
stack-realignment.99dae2b73e.ll (mutant of stack-realignment.ll)caller64-mtriple=riscv64 -target-abi lp64e -verify-machineinstrs
unaligned-load-store.24a915c99b.ll (mutant of unaligned-load-store.ll)load_i64-mtriple=riscv64 -verify-machineinstrs
unaligned-load-store.27209cbe06.ll (mutant of unaligned-load-store.ll)load_i64-mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs
unaligned-load-store.8ad0a92927.ll (mutant of unaligned-load-store.ll)load_i64-mtriple=riscv64 -mattr=+unaligned-scalar-mem -verify-machineinstrs
wide-scalar-shift-by-byte-multiple-legalization.44e3091b6b.ll (mutant of wide-scalar-shift-by-byte-multiple-legalization.ll)shl_8bytes-mtriple=riscv64 -verify-machineinstrs
xtheadmemidx.6e29f0946b.ll (mutant of xtheadmemidx.ll)lurhu-mtriple=riscv64 -mattr=+d,+xtheadmemidx -verify-machineinstrs
zbb-logic-neg-imm.403c582e38.ll (mutant of zbb-logic-neg-imm.ll)xorlow31-mtriple=riscv64 -mattr=+zbb,+zbs -verify-machineinstrs
zbb-logic-neg-imm.5f71255180.ll (mutant of zbb-logic-neg-imm.ll)xorlow31-mtriple=riscv64 -mattr=+zbb -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.