fallback: legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64,s32

Run:explore-bc8218b282-20261015-075519
Kind:fallback
Category:legalize: G_INSERT_VECTOR_ELT <2 x s64>,s64,s32 NEW
Occurrences:46 in 29 configs, 22 test files
Snippet from:stack-realignment.1fc6db3a04.ll (mutant of stack-realignment.ll) @caller64 via llvm-extract + llvm-reduce
Config:-mtriple=riscv32 -verify-machineinstrs
Local check:reproduces at bc8218b282
Compiler Explorer:https://godbolt.org/z/bx7a8efzY (llc-assertions-trunk, checked 2026-10-15 08:05 UTC): G reproduces

Snippet:

define <2 x i64> @caller64(i64 %LGV1) {
  %I = insertelement <2 x i64> zeroinitializer, i64 0, i64 %LGV1
  ret <2 x i64> %I
}

Compiler Explorer panes:

PaneOptionsExitInstsstderr
GlobalISel-mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.*021remark: <unknown>:0:0: unable to legalize instruction: %4:_(<2 x s64>) = G_INSERT_VECTOR_ELT %5:_, %6:_(s64), %7:_(s32) (in function: caller64)
warning: Instruction selection used fallback path for caller64
SelectionDAG (control)-mtriple=riscv32 -verify-machineinstrs -global-isel=0021-

Reproduce:

llc -mtriple=riscv32 -verify-machineinstrs -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel.* snippet.ll -o -
llc -mtriple=riscv32 -verify-machineinstrs -global-isel=0 snippet.ll -o -

Local llc output:

remark: <unknown>:0:0: unable to legalize instruction: %4:_(<2 x s64>) = G_INSERT_VECTOR_ELT %5:_, %6:_(s64), %7:_(s32) (in function: caller64)
warning: Instruction selection used fallback path for caller64

Occurrences (46):

InputFunctionConfig
atomic-load-zext.0e49e1a2ad.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv32 -mattr=+a,+zalasr -verify-machineinstrs
atomic-load-zext.2b70cbc1da.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv32 -mattr=+a -verify-machineinstrs
atomic-load-zext.678a77f540.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv32 -verify-machineinstrs
atomic-load-zext.8112773398.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv32 -mattr=+a,+zalasr,+ztso -verify-machineinstrs
atomic-load-zext.b139a445a6.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv32 -mattr=+a,+no-trailing-seq-cst-fence -verify-machineinstrs
atomic-load-zext.b2af35946a.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv32 -mattr=+a,+ztso,+no-trailing-seq-cst-fence -verify-machineinstrs
atomic-load-zext.ea7dc6e4b6.ll (mutant of atomic-load-zext.ll)atomic_load_i8_unordered-mtriple=riscv32 -mattr=+a,+ztso -verify-machineinstrs
atomic-rmw-discard.659ee687d7.ll (mutant of atomic-rmw-discard.ll)amoand_w_discard-O3 -mtriple=riscv32 -mattr=+a -verify-machineinstrs
div-pow2.2a266174f3.ll (mutant of div-pow2.ll)sdiv32_pow2_4096-mtriple=riscv32 -verify-machineinstrs
double-select-fcmp.8630a7c0d4.ll (mutant of double-select-fcmp.ll)select_fcmp_olt-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32d
double-select-fcmp.8650d9e455.ll (mutant of double-select-fcmp.ll)select_fcmp_olt-mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs -target-abi=ilp32
float-br-fcmp.488da02be6.ll (mutant of float-br-fcmp.ll)br_fcmp_oge-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
float-intrinsics.23638c864a.ll (mutant of float-intrinsics.ll)issnan_fpclass-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
float-intrinsics.82440071a1.ll (mutant of float-intrinsics.ll)issnan_fpclass-mtriple=riscv32 -mattr=+d -verify-machineinstrs -target-abi=ilp32f
float-intrinsics.f6435bd8f0.ll (mutant of float-intrinsics.ll)issnan_fpclass-mtriple=riscv32 -verify-machineinstrs
float-select-fcmp.efa5e662d2.ll (mutant of float-select-fcmp.ll)select_fcmp_olt-mtriple=riscv32 -mattr=+f -verify-machineinstrs -target-abi=ilp32f
half-select-fcmp.37c38dea45.ll (mutant of half-select-fcmp.ll)select_fcmp_olt-mtriple=riscv32 -mattr=+zfhmin -verify-machineinstrs -target-abi=ilp32f
half-select-fcmp.6b2dfa1fd4.ll (mutant of half-select-fcmp.ll)select_fcmp_olt-mtriple=riscv32 -mattr=+zfh -verify-machineinstrs -target-abi ilp32f
half-zfa.382e1c17e9.ll (mutant of half-zfa.ll)fround_h_3-mtriple=riscv32 -target-abi ilp32f -mattr=+zfa,+zfh
orc-b-patterns.3ad22770fc.ll (mutant of orc-b-patterns.ll)orc_b_i32_sub_shl8x_x_b2-mtriple=riscv32 -verify-machineinstrs
orc-b-patterns.df30fb4d4f.ll (mutant of orc-b-patterns.ll)orc_b_i32_sub_shl8x_x_b2-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
rem.ba75d01cf2.ll (mutant of rem.ll)srem_pow2_2-mtriple=riscv32 -mattr=+m -verify-machineinstrs
rem.fb0df0d380.ll (mutant of rem.ll)srem_pow2_2-mtriple=riscv32 -verify-machineinstrs
rv32xtheadbb.320dfe6d8b.ll (mutant of rv32xtheadbb.ll)sexti1_i32-mtriple=riscv32 -mattr=+xtheadbb -verify-machineinstrs
rv32xtheadbb.bd262b95a8.ll (mutant of rv32xtheadbb.ll)sexti1_i32-mtriple=riscv32 -verify-machineinstrs
rv32xtheadbb.db8c812a90.ll (mutant of rv32xtheadbb.ll)sexti1_i32-mtriple=riscv32 -mattr=+xtheadbb,+b -verify-machineinstrs
shifts.690e0a2d42.ll (mutant of shifts.ll)shl64-mtriple=riscv32 -verify-machineinstrs
shlimm-addimm.8609b1162d.ll (mutant of shlimm-addimm.ll)shl5_add101024_b-mtriple=riscv32 -verify-machineinstrs
stack-realignment.1fc6db3a04.ll (mutant of stack-realignment.ll)caller64-mtriple=riscv32 -verify-machineinstrs
stack-realignment.adbc92642b.ll (mutant of stack-realignment.ll)caller64-mtriple=riscv32 -target-abi ilp32e -verify-machineinstrs
unaligned-load-store.05f2ceb410.ll (mutant of unaligned-load-store.ll)load_i64-mtriple=riscv32 -mattr=+unaligned-scalar-mem -verify-machineinstrs
unaligned-load-store.9e34800c4e.ll (mutant of unaligned-load-store.ll)load_i64-mtriple=riscv32 -verify-machineinstrs
unaligned-load-store.af7de9541d.ll (mutant of unaligned-load-store.ll)load_i64-mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs
wide-scalar-shift-by-byte-multiple-legalization.280a85bd11.ll (mutant of wide-scalar-shift-by-byte-multiple-legalization.ll)shl_8bytes-mtriple=riscv32 -verify-machineinstrs
xqcibm-cto-clo-brev.0bee6d37fa.ll (mutant of xqcibm-cto-clo-brev.ll)test_cttz_i8_zero_poison-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs
xqcibm-cto-clo-brev.2e586f1693.ll (mutant of xqcibm-cto-clo-brev.ll)test_cttz_i8_zero_poison-mtriple=riscv32 -verify-machineinstrs
xqcibm-cto-clo-brev.7e324efaaa.ll (mutant of xqcibm-cto-clo-brev.ll)test_cttz_i8_zero_poison-mtriple=riscv32 -mattr=+zbb,xqcibm -verify-machineinstrs
xqcibm-insert.29ebeb3e22.ll (mutant of xqcibm-insert.ll)test_insbi_shifted_mask_multiple_uses-mtriple=riscv32 -mattr=+xqcibm,+zbs -verify-machineinstrs
xqcibm-insert.943ec647b5.ll (mutant of xqcibm-insert.ll)test_insbi_shifted_mask_multiple_uses-mtriple=riscv32 -mattr=+xqcibm -verify-machineinstrs
xqcibm-insert.dfc4b32a9e.ll (mutant of xqcibm-insert.ll)test_insbi_shifted_mask_multiple_uses-mtriple=riscv32 -verify-machineinstrs
xqcisls.1a8400518f.ll (mutant of xqcisls.ll)lw_ri-mtriple=riscv32 -verify-machineinstrs
xqcisls.57a324e348.ll (mutant of xqcisls.ll)lw_ri-mtriple=riscv32 -mattr=+zba,+xqcisls -verify-machineinstrs
xqcisls.5ef6b7da76.ll (mutant of xqcisls.ll)lw_ri-mtriple=riscv32 --mattr=+zba -verify-machineinstrs
xtheadmemidx.3496090a6c.ll (mutant of xtheadmemidx.ll)lurhu-mtriple=riscv32 -mattr=+d,+xtheadmemidx -verify-machineinstrs
zbb-logic-neg-imm.d2ba835498.ll (mutant of zbb-logic-neg-imm.ll)xorlow31-mtriple=riscv32 -mattr=+zbb,+zbs -verify-machineinstrs
zbb-logic-neg-imm.e17c70ad26.ll (mutant of zbb-logic-neg-imm.ll)xorlow31-mtriple=riscv32 -mattr=+zbb -verify-machineinstrs

Generated 2026-10-15 08:05 UTC.